4 Replies Latest reply on Jul 7, 2020 8:04 PM by TakahiroK_16

    S70FL01GSAGBHIC10 for Zynq Configuration



      I'm planning to use the S70FL01GSAGBHIC10 QSPI for Zynq configuration.  Since this part is a dual stacked 512Mb chip, it contains two chip selects.  I can connect these two chip selects to the Zynq MIO pins 0/1.  Should I connect the data lines from MIO2-MIO5 to MIO10-MIO13 and also to the QSPI?  Also, there are two clocks provided from the Zynq to run two separate QSPI chips.  Should I OR the two clocks together to connect to the single clock input on the QSPI?  Lastly, do the chip select signals on the QSPI require pull-ups or are there internal pull-ups on these signals?


      Thanks for any help.