5 Replies Latest reply on Jul 13, 2018 9:50 AM by YeshwanthK_56

    ADC and DMA in PSOC6


      I'm sure this is possible, but I'm wondering if anyone has put together a demonstration of something like this. 


      1) ADC is triggered by a timer interrupt to take a set of samples. Done in the M0+

      2) The set of samples is transferred to a circular buffer serviced by DMA

      3) M0+ gets an interrupt when the ADC has had its samples transferred to memory

      4) M0+ analyzes a portion of the sample set and if a pattern is found, send a pointer to the M4 to analyze the samples.


      So here are some basic questions I need answered:

      1) can the DMA on the PSOC6 support an arbitrary sized circular buffer in memory?

      2) can the M0+ obtain a pointer from the DMA engine to determine where the ADC is currently putting data?

      3) can the buffer be set up so that the M0+ has R/W access and the M4 can only have R access?


      Let me know if this can be done and if a project already exists.  If not, please point me to the relavant CE's or Appnotes that describe what I require.




        • 1. Re: ADC and DMA in PSOC6



          Follow the below steps to implement the requirement:


          1) ADC Configuration:

               a) Configure ADC to sample data for every trigger sent to SOC (trigger can be generated periodically using a timer) and use the EOC output signal to trigger the DMA to transfer data when conversion is complete.


          2) DMA Configuration:

               a) Connect the EOC of ADC to trigger input of DMA.

               b) Configure a descriptor to transfer data from "data output register" of ADC to some buffer location in memory.

               c) Disable source address incrementation, auto increment destination by one data element.

               d) Configure the descriptor to transfer N data elements ( 'N' is the number of samples required per cycle). Chain the descriptor to itself so that the new data is overwritten on the old ones every cycle.

               e) Configure the DMA to generate an interrupt when one cycle of data transfer is complete.

               f)  Use the above generated interrupt to analyse the samples in M0+ core.


          If these steps don't address your problem. Please ping back with more details.




          • 2. Re: ADC and DMA in PSOC6

            The only issue with this scenario is that I want to have a large buffer of samples and roll it over when it gets to the end of the buffer.  For example, say I need to get 8 inputs sampled (at 8-bit resolution) with the ADC.  Through sequencing, it should be able to do this.  I would assume that the DMA can transfer the 8 samples that get grabbed.  I want to be able to store say 100 sample sets so my buffer is 800 bytes in size.  I want to fill these 800 bytes then roll over back to the beginning of the buffer and overwrite the oldest data.


            Can this be accomplished?

            • 3. Re: ADC and DMA in PSOC6

              Yes. This is exactly what the DMA does. Configure one descriptor to transfer 800 bytes of element. Then chain it back to itself. When the descriptor finishes the first 800 bytes of data transmission. It will redo the same process again, rewriting the data from the oldest to newest.


              Checkout this example : http://www.cypress.com/documentation/application-notes/an61102-psoc-3-and-psoc-5lp-adc-data-buffering-using-dma


              It is close to what you require. If you get any doubts please comment down here.



              1 of 1 people found this helpful
              • 4. Re: ADC and DMA in PSOC6

                Thanks Yeshwanth.  Our customer is following this thread and will work with the suggestions.

                • 5. Re: ADC and DMA in PSOC6

                  Sure. If exact specifications of the project are provided I can give a more specific project configuration details. Please feel free to post any doubts here.