5 Replies Latest reply on Aug 1, 2018 3:38 AM by keaj

    CX3 3065: HOW TO CFG MIPI CSI-2

    cooers1132002_3181946


      I‘m trying to cfg CX3 3065 for receiving data with OV sensor, The MIPI CSI-2 is configured as below:

      And the MIPI error thread has got some errcnt: frmErrCnt  ctlErrCnt  recSyncCnt  unrecSyncCnt,  So how can i cfg to Eliminate these errors ?

        • 1. Re: CX3 3065: HOW TO CFG MIPI CSI-2
          abga

          Hi Jack Lee,

           

          I also tried to configure MIPI tool with the above configuration and I got the following configuration in the "CyU3mipicsi.c" file. Try to match it with yours:

          CyU3PMipicsiCfg_t test_RAW8_Resolution0 = 

          {

              CY_U3P_CSI_DF_RAW8,  /* CyU3PMipicsiDataFormat_t dataFormat */

              1,                          /* uint8_t numDataLanes */

              12, /* uint8_t pllPrd */

              358, /* uint16_t pllFbd */

              CY_U3P_CSI_PLL_FRS_125_250M, /* CyU3PMipicsiPllClkFrs_t pllFrs */  

              CY_U3P_CSI_PLL_CLK_DIV_2, /* CyU3PMipicsiPllClkDiv_t csiRxClkDiv */

              CY_U3P_CSI_PLL_CLK_DIV_2, /* CyU3PMipicsiPllClkDiv_t parClkDiv */

              0,                 /* uint16_t mClkCtl */

              CY_U3P_CSI_PLL_CLK_DIV_2, /* CyU3PMipicsiPllClkDiv_t mClkRefDiv */

              640,         /* uint16_t hResolution */

              0                         /* uint16_t fifoDelay */

          };

           

          Also, please mention whether you are able to stream the video or not.

           

          For your reference let me tell you what these error counts mean:

          1. CRC Error Count:

          This error occurs when crc error is detected when receiving HS data packets.

          For each CRC error, this count is incremented.

           

          2. Framing Error Count:

          This error occurs when an un-expected Frame start or Frame end short packet is received.

          For each such error the count is increased.

           

          3. Recoverable Sync Byte Error Count:

          This error occurs when HS Sync Byte was received by Rx with correctable errors.

          For each such error the count is increased.

           

          4. Unrecoverable Packet Header Error Count:

          This error occurs when a HS packet header is received with errors that are not correctable by ECC.

          For each such error the count is increased.

           

          Thanks & Regards

          Abhinav

          • 2. Re: CX3 3065: HOW TO CFG MIPI CSI-2
            cooers1132002_3181946

            Hi abga,

             

            Very grateful for your assistance.

            The video can stream out if  I modified the pllFbd from 358 to 336. But there are also some errors: frmErrCnt  ctlErrCnt  recSyncCnt  unrecSyncCnt, and the frame rate is unstable. So what would you recommend to eliminate these errors?

             

            actually I have measured some MIPI parameters with oscilloscope:

            H-Active 10.9us

            H-Total 19.3us

            V-Active 9.3ms

            V-Total 16.67m

            The measured H-Active is different with the H-Active which generated by MIPI tool. And modifying H-Blanking in MIPI tool has no effect. How should I configure?

            • 3. Re: CX3 3065: HOW TO CFG MIPI CSI-2
              abga

              Hi,

               

              Based on the timings that you have provided in the previous response. I have calculated some parameters:

               

              I assume that you are using CSI clock of 288 MHz

              then

              HACTIVE = 785

              H BLANK = 605

              V ACTIVE = 482

              V BLANK = 382

              PCLK = 72

               

              Could you attach the screen shot of first tab of MIPI tool.

              Also mention the exact CSI clock to be used.

               

              Thanks & regards

              Abhinav

              • 4. Re: CX3 3065: HOW TO CFG MIPI CSI-2
                cooers1132002_3181946

                Hi

                the screen shot as below:

                IMG_2044.JPG

                actually the CSI clock is 248MHz, the 288MHz is wrong(i made a mistake).

                • 5. Re: CX3 3065: HOW TO CFG MIPI CSI-2
                  keaj

                  You may try the following configuration and check if it is working.

                   

                  CyU3PMipicsiCfg_t test_RAW8_Resolution0 =

                  {

                      CY_U3P_CSI_DF_RAW8,  /* CyU3PMipicsiDataFormat_t dataFormat */

                      1,                          /* uint8_t numDataLanes */

                      2, /* uint8_t pllPrd */

                      99, /* uint16_t pllFbd */

                      CY_U3P_CSI_PLL_FRS_125_250M, /* CyU3PMipicsiPllClkFrs_t pllFrs */ 

                      CY_U3P_CSI_PLL_CLK_DIV_2, /* CyU3PMipicsiPllClkDiv_t csiRxClkDiv */

                      CY_U3P_CSI_PLL_CLK_DIV_4, /* CyU3PMipicsiPllClkDiv_t parClkDiv */

                      0,                 /* uint16_t mClkCtl */

                      CY_U3P_CSI_PLL_CLK_DIV_2, /* CyU3PMipicsiPllClkDiv_t mClkRefDiv */

                      640,         /* uint16_t hResolution */

                      0                         /* uint16_t fifoDelay */

                  };

                   

                  And also

                  1. Vary the ‘thsSettleDelay’ parameter of “CyU3PMipicsiSetPhyTimeDelay()” API to check if the sensor is streaming for any of the delay value. Keep the first parameter as 0x01 always.
                  2. Check if the MIPI error reduces to zero for any thsSettleDelay value.