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The section '.cy_em_eeprom' allocated for two cores should have same initial values. If you use only cm0+ as well as BLE component, system will also allocate eeprom space in section '.cy_em_eeprom' to store BLE bonding list for only cm0+, which can cause mismatch between the two cores.
Given only cm0+ used, I believe you can just comment lines in cm4 linker file (.ld) to make it unaccessible to eeprom space:
em_eeprom (rx) : ORIGIN = 0x14000000, LENGTH = 0x8000 /* 32 KB */
/* Emulated EEPROM Flash area */
} > em_eeprom
Thank you for your help! That did the job, both options successfully compile the project with EmEEPROM