This image will be be self explanatory and should be able to help you with selecting the acquisition time.
you can check the architectural TRM ADC section http://www.cypress.com/file/126171/download . From the image you cans see that the DC resistance is due to the routing path.
The actual input impedance you see from the ADC will be higher than this. It is the routing resistance till the sampling capacitor. The actual resistance due to the sampling capacitor will be some where around 1/(sample rate * 6.4pF).