I'm wondering if FRAMs have some kind of memory organization similar to other memories.
Does 16kbit FRAM consist of 8 pages of 256 bytes blocks/pages or 256 times 8-bytes of rows?
Datasheet of FM24CL16B, page 6 of 19, chapter Slave Device Address it says:
"Bits 3-1 are the page select. It specifies the 256-byte block of memory that is targeted for the current operation."
Same document, page 8 of 19, chapter Endurance it says:
"The memory architecture is based on an array of rows and columns. Each read or write access causes an endurance cycle for an entire row. In the FM24C16B, a row is 64
bits wide. Every 8-byte boundary marks the beginning of a new row."
So should we consider that; it's refreshing an 8-bytes of row not a 256-bytes of block each write/read operation?
Asking this because of our safety concerns. Generally we're working with redundant memory page; ex. for settings we allocate two pages of memory -with checksum of course-, while writing first page in case of noise or power-down, second page will be kept uncorrupted so we can recover.
Waiting for your reply.
Message was edited by: Cesim Can Özer Checked Endurance chapter later.
The FRAM is refreshing an 8-bytes of row for each write/read operation. There is no page or block architecture internally.
Thanks and Regards,