4 Replies Latest reply on Jul 5, 2018 7:55 AM by user_250433950

    Can I decrease FX3 internal clocks if we use only USB 2.0 bus?

    user_250433950

      Hi,

      It seems to have some restrictions around the FX3 internal clocks. For example, there is a mention about DMA overflow in some cases if we decrease the internals clocks. The main problem here is we want to decrease the power consumption of the FX3 (each mA counts!). For this particular design, we will operate only in USB 2.0. Does anybody has some experience about safe settings for internal clocks of the FX3? (CPU, DMA clocks?)

       

      Thanks,

      Denis.

        • 1. Re: Can I decrease FX3 internal clocks if we use only USB 2.0 bus?
          abga

          Hi,

           

          Most clocks are derived from the system clock "CY_U3P_SYS_CLK". If you want to decrease the clock frequency of a particular block, you have to increase the clock division factor for that particular block. Please note that if you slow down the clock for a particular block, its performance will be degraded hence you have to be careful while doing this. If you decrease the clock frequency for USBPHY below a certain value then your device may face USB compliance issue. Could you please describe about your application and which firmware example you are using?

           

          Thanks & Regards

          Abhinav

          • 2. Re: Can I decrease FX3 internal clocks if we use only USB 2.0 bus?
            user_250433950

            Hi Abhinav,

            We want to use the same PCB as another USB 3.0 product, but as I said, this one will work only on USB 2.0. We will do bulk transferts of about 50Mb/s max with small ISO transferts also. Right now, we need to save about 20mA total to be below the 500mA limit of USB 2.0.

             

            We tried to play with dividers, but as you mentioned previously, the device stopped to work with many different settings. I was expecting some guidelines from Cypress to know the exact limits of each clock with our application (USB 2.0 with bulk transfert of less than 15% total BW).

             

            Do you have more precises values to share?

            Thanks,

            Denis Alain, Eng.

            • 3. Re: Can I decrease FX3 internal clocks if we use only USB 2.0 bus?
              abga

              Hi Denis,

               

              We had observed that FX3 can't draw more than 500 mA even with USB 3.0. Could you please mention what all devices are connected in the peripheral of FX3. One suggestion is you can shutdown those blocks in FX3 which you are not using. Also cypress doesn't provide any exact limits of each clock as it varies according to application, you have to do hit and trial to get the minimum value of clock frequency.

               

              Thanks & Regards

              Abhinav

              • 4. Re: Can I decrease FX3 internal clocks if we use only USB 2.0 bus?
                user_250433950

                Hi Abhinav,

                Unfortunately, I cannot share the exact block diagram of our product on the forum. This is confidential information. The GPIF is working at 31MHz to save power. The SPI is not used and the I2C is used at 100kHz. This is the information I can share. The limit of 500mA is a problem because of the complete solution (the Fx3 alone is not the problem).

                 

                Since it is trial and error things, we won't play with the internal clocks of the FX3 to avoid problems. I would expect some guidelines, but I understand that you didn't have these numbers. For this reason, I think we can consider this thread closed.

                 

                Thanks & Best Regards,

                Denis.