1 Reply Latest reply on Jun 22, 2018 1:57 AM by PradiptaB_11

    CY7C2665KV18 termination impedances and pull ups

      Hello,


      We are using a QDR memory (CY7C2665KV18 clocked at 450 MHz with 1.8V core and 1.5V for HSTL logic)  following this datasheet [1] http://www.cypress.com/file/45386/download and these guidelines [1] http://www.cypress.com/file/38596/download.

      The QDR memory is connected to a MPF300TS-1FCG1152I/EES FPGA device.  In the current state of our project we have routed all data buses, address and control signals matched in length and impedance (50 Ohm),

      but recently, we have noticed that we could have misunderstood impedance configuration following [1] and [2] after having found this forum enough time later [3] https://community.cypress.com/thread/27706?start=0&tstart=0

       

      In [2] at page 11 (Signal integrity and Layout Guidelines), the app note says:

       

      "Cypress Packages are routed to obtain all traces to

      50 Ω ± 10%. All traces must be routed to have 50-Ω

      impedance and should have no impedance

      1. discontinuities."

       

      Ok, done.

       

      "Consider using a series resistor to match total driver

      side impedance to 50 Ω."

       

      Ok, this is true if our output driver impedance is less to 50 Ohm, so we decided set the RQ resistor to 250 Ohm. Then at page 24 in [2] 7th paragraph we have:

       

      "The value of the termination resistor (R) is 50 Ω

      because most designs have a trace characteristic

      impedance of 50 Ω. The termination resistor value

      must be equal to the characteristic impedance of the

      1. trace."

       

      Considering [3], this is true (close to 50 Ohm) for RQ equal to 175 if Low range setting ODT but output buffers are to 35 Ohm.  Once our tracks are routed this solution is too hard to implement for us at this moment, the same remains for 8th paragraph in [2].

      But in the 9th Paragraph of [2], the app says:

       

      "The other recommendation is to keep RQ equals to

      250 Ω then the output driver impedance of memory is

      50 Ω and with ODT pin low, the ODT value of memory

      is 75 Ω. In this case, the reflection co-efficient is

      positive with trace impedance of 50 Ω and customer

      does not need to use external resistors to match the impedance. "

       

      Can we infer here that the ODT inputs are at 75 Ohm and this does not have remarkable effect in signal integrity? were somewhat confused at these points.

      Following figure 39 at page 23 of [2], does this implies that we have to put mandatory termination resistors at WPS/RPS control signals, CP/CP_N, and address bus because there aren't ODT signals?

       

      If we didn't loss anything at this point, we have thought a possible solution to overcome our problem with minimal impact in layout:

       

      Set RQ = 250 Ohm

      Set ODT pin Low, so ODT signals at 75 Ohm.

      if Address and other ODT signals must be terminated with a pull up resistor (50 Ohm) to VTT, use a VTT termination regulator (for example NCP51400 http://www.onsemi.com/pub/Collateral/NCP51400-D.PDF or another one), and then place 0201 50 Ohm resistors close to Fanout vias.

       

      can be this solution effective? otherwise what are the alternatives?

       

      Thanks in advance

        • 1. Re: CY7C2665KV18 termination impedances and pull ups
          PradiptaB_11

          Hi Raul,

           

          Please find my comments below

           

          Q1) Can we infer here that the ODT inputs are at 75 Ohm and this does not have remarkable effect in signal integrity?

          Ans) Yes.

           

          Q2) Following figure 39 at page 23 of [2], does this implies that we have to put mandatory termination resistors at WPS/RPS control signals, CP/CP_N, and address bus because there aren't ODT signals?

          Ans) Yes, your understanding is correct.

           

          Q3) If we didn't loss anything at this point, we have thought a possible solution to overcome our problem with minimal impact in layout:

          Set RQ = 250 Ohm

          Set ODT pin Low, so ODT signals at 75 Ohm.

          if Address and other ODT signals must be terminated with a pull up resistor (50 Ohm) to VTT, use a VTT termination regulator (for example NCP51400 http://www.onsemi.com/pub/Collateral/NCP51400-D.PDF or another one), and then place 0201 50 Ohm resistors close to Fanout vias.

          can be this solution effective? otherwise what are the alternatives?

          Ans) This solution will be okay.

           

          Thanks and Regards,

          Pradipta.