6 Replies Latest reply on Jul 9, 2018 2:01 AM by PradiptaB_11

    S29JL-J: State of DQ7, DQ6 and DQ5 at the programming from 0 to 1

    NaMo_1534561

      Hello,

       

      According to the S29JL-J data sheet,

      Programming from 0 to 1 states that the bank is set to DQ5 = 1 or that the DQ7 and DQ6 status bits indicate that the operation was successful.

       

      Why are there two different states?

      What is the condition for DQ5 = 1?

       

      Best Regards,

      Naoaki Morimoto

        • 1. Re: S29JL-J: State of DQ7, DQ6 and DQ5 at the programming from 0 to 1
          PradiptaB_11

          Hi Naoaki-san,

           

          Initially, or after a chip erase command the default value for flash memory is 1. By a program operation you can change it to 0. Please note to make it 1 again you need to carry out a erase operation. A program operation will not change a 0 to 1.

           

          DQ5 = 1 can happen under two circumstances.

          1) The device may output a 1 on DQ5 if the system tries to program a 1 to a location that was previously programmed to 0. Only an erase operation can change a 0 back to a 1. Under this condition, the device halts the operation, and when the timing limit has been exceeded, DQ5 produces a 1.

           

          2) DQ5 indicates whether the program or erase time has exceeded a specified internal pulse count limit. Under these conditions DQ5 produces a 1, indicating that the program or erase cycle was not successfully completed.

           

          Whenever the system initially begins reading toggle bit status, it must read DQ15–DQ0 (or DQ7–DQ0 for x8-only device) at least twice in a row to determine whether a toggle bit is toggling. Typically, the system would note and store the value of the toggle bit after the first read. After the second read, the system would compare the new value of the toggle bit with the first. If the toggle bit is not toggling, the device has completed the program or erase operation. The system can read array data on DQ15–DQ0 (or DQ7–DQ0 for x8-only device) on the following read cycle. However, if after the initial two read cycles, the system determines that the toggle bit is still toggling, the system also should note whether the value of DQ5 is high. If it is, the system should then determine again whether the toggle bit is toggling, since the toggle bit may have stopped toggling just as DQ5 went high. If the toggle bit is no longer toggling, the device has successfully completed the program or erase operation. If it is still toggling, the device did not completed the operation successfully, and the system must write the reset command to return to reading array data.

           

          Thanks and Regards,

          Pradipta.

          • 2. Re: S29JL-J: State of DQ7, DQ6 and DQ5 at the programming from 0 to 1
            NaMo_1534561

            Hello Pradipta-san,

             

            The customer wants to reproduce the procedure of making DQ5 = 1 when trying to change the bit from 0 to 1 by program operation.

            On the customer's board, no state where DQ5 = 1 is observed.

            Is there a procedure to reproduce the state where DQ5 = 1 when trying to change bit from 0 to 1 by program operation?

             

            Best Regards,

            Naoaki Morimoto

            • 3. Re: S29JL-J: State of DQ7, DQ6 and DQ5 at the programming from 0 to 1
              PradiptaB_11

              Hi Naoki-san,

               

              You are trying to reproduce the DQ5=1 condition. Can you let us know did you try the below process and your observation.

              --->The device may output a 1 on DQ5 if the system tries to program a 1 to a location that was previously programmed to 0. Only an erase operation can change a 0 back to a 1. Under this condition, the device halts the operation, and when the timing limit has been exceeded, DQ5 produces a 1.

               

              Thanks and Regards,

              Pradipta.

               

               

              • 4. Re: S29JL-J: State of DQ7, DQ6 and DQ5 at the programming from 0 to 1
                NaMo_1534561

                Hi Pradipta-san,

                 

                The customer tries to program 1 to a location previously programmed to 0.

                This is to confirm the operation when illegal access is made to F-RAM, it is not used for actual mass production product.

                 

                According to the data sheet, it says that 1 is output to DQ5, but it seems that the program ended normally while DQ5 remains 0 in customer's evaluation (However, the data remained 0).

                 

                How long will it take for the DQ5 to become 1 after the timing limit is exceeded?

                Perhaps the timing for customers to monitor DQ5 is too early.

                 

                Best Regards,

                Naoaki Morimoto

                • 5. Re: S29JL-J: State of DQ7, DQ6 and DQ5 at the programming from 0 to 1
                  NaMo_1534561

                  Hi Pradipta-san,

                   

                  Do you have any update?

                  If 0 is programmed to 1, the state of DQ 5 may be 1, or may not it be?

                  In that case, what is the reason for the difference?

                   

                  Or should DQ5 always be 1?

                   

                  Best Regards,

                  Naoaki Morimoto

                  • 6. Re: S29JL-J: State of DQ7, DQ6 and DQ5 at the programming from 0 to 1
                    PradiptaB_11

                    Hi Naoki-san,

                     

                    Our Team has just tested this sequence on real JL064J silicon and when we tried to set bits which are already programmed to 0, back to 1, DQ5 is set after a certain timeout period, not immediately.

                    You can find the full logs attached to this email.

                     

                    Here is the sequence used:

                    1. Read offset 0x0: 0xFFFF (ReadOp 0)
                    2. Program 0x0 to offset 0x0 (ProgramOp 0 0)
                    3. Verify that offset 0x0 contain 0x0 as data (ReadOp 0)
                    4. dt (display trace): verify traces
                    5. Try to program data 0x1 to offset 0x0 (ProgramOp 0 1) à Status is timeout
                    6. dt (display trace): verify traces
                    7. Read toggling data (0xE4)
                    8. Read toggling data (0xA4)
                    9. Read toggling data (0xE4)

                     

                    You can see from the traces in step 6 that the device goes first busy with DQ6 toggling (0xc4 0x84 0xc4 0x84 ) then after a timeout period switches to toggling data: 0xE4 0xA4 0xE4 0xA4 which means DQ5 was set to 1.

                    So as you can see, the operation can never complete successfully. DQ5 will always be set and the SW should be able to catch this timeout event.