3 Replies Latest reply on Jul 4, 2018 6:16 AM by abga

    Does S-Port have a FIFO interface ?

    bwasim

      I have an application processor which is interfaced to the Cypress FX3 chip via memory controller. My job is to access the S-Port via the P-Port, configure it and perform R/W to an SD card connected to the SIB0. I have been able to initialize the card successfully. So I know that the SD command interface is working. Now I have to perform block R/W from/to the SD card, and I'm stuck here because the S-Port does not support any FIFO interface(please correct me if I'm wrong). I've looked at the reference code and in that code, I see that the S-Port is interfaced with the DMA. Please note that in my case, doing DMA will be complicated and very inefficient because the data buffer(read or write) is stored in the application processor and cannot be passed directly to the FX3s. Therefore, if I have something to write to the SD card via DMA, I will firstly have to copy the buffer from the application processor to the FX3s internal memory and then initiate a write via DMA. Please note that this is very inefficient. Another thing that I can do is transfer data byte by byte via the CMD52 interface. Apart from being slow and undesirable, it does not allow to transfer more than 16 bytes at a time and requires a new command for every byte transfer. The Application processor and the FX3s don't have any shared memory and therefore the above mentioned mechanisms are the only possible.

      Back to the original question: I can get rid of all this if the S-Port has a FIFO R/W register. With that, I can trigger a CMD53 and continuously perform R/W on that register based on some condition. That would make my implementation simpler and faster. In the reference manual, I do not see any such register but the reference manual seems to be not complete anyway so I think its best if I ask this question on the forum. Hopefully I'll have answer to this question very soon.

        • 1. Re: Does S-Port have a FIFO interface ?
          Madhu Lakshmipathy

          Hi Bilal,

           

          Such register mode is not possible in S-port.Are you referring to the cyfx_pmmc example?

           

          If so,please note that instead of DMA_MANUAL channel used there, you can also use AUTO or auto_signal channels. These are more faster and don't have to wait for DMA callbacks to commit the data from AP to S-port.

           

          Regards,

          - Madhu Sudhan

          • 2. Re: Does S-Port have a FIFO interface ?
            bwasim

            Hi Madhu,

            I'm not using any of cypress examples. Rather I'm creating my own application based on an RTOS. So my question is not from that context. Also, I'm not working at the application level right now. Instead I'm creating my own SIB driver so to speak. Let me explain to you how this works very briefly.

            We have an application processor which has access to the FX3 VIA P-Port. We have a driver on the application processor for the SIB0(the SIB register access works via p-port). This driver is working because I see the command interface working, i.e. when I send a command, I receive a response for it. Now the problem is that I have bulk data on the application processor that needs to be transferred via the SIB0 driver to the SD card. This creates a problem for us because the buffer that is to be transferred is in the external DRAM of the application processor(the FX3s cannot see this). Therefore if we are to use DMA for bulk transfers, we have to copy the data in the FX3s internal memory space and then do the read or write. Please note that this mechanism involves two-step procedure and therefore would be very slow. Therefore I'm looking for alternatives. If I'm unable to find one, I will go ahead and implement the above mentioned two-step process(highly undesirable).

            The easiest alternative would be that the SIB0 register set has a FIFO register. That will not only get rid of the two-step procedure but it would make my implementation much simpler. Please let me know if there is.

            If not, I think that this is a flaw in the design of the SIB peripheral IP. As you mention everywhere, the FX3s is used to be interfaced with the external memory and p-port to access the memory-mapped space of the device. But we are unable to do this effectively because we have to follow this two-step procedure. Would you agree with this ? As the FX3s is used as an IO expansion bridge, consider for example that we have an SD-card attached to the SIB0 which is controlled via the application processor. Considering the system and the interface exposed, I don't think that we would ever be able to extract reasonable R/W speeds from the SD card. What do you think about this ?

            Regards,

            Bilal

            • 3. Re: Does S-Port have a FIFO interface ?
              abga

              Hello Bilal,

               

              You can check "cyfxgpiftostorage" firmware example in the following path:

              C:\Program Files (x86)\Cypress\EZ-USB FX3 SDK\1.3\firmware\gpif_examples

              This example makes use of mailbox registers of P-port that can actually send the 8 bytes of data at a time to S -Port with less latency.

              Hope this may help you !!

               

              Thanks & Regards

              Abhinav