Is there anyone can help with these question?
On the SIP module.
Physical Pin 25 = Logical Pin P1, which is tied to the write protect pin of the internal EEPROM.
Physical Pin 32 = Logical Pin P4, which is a GPIO in addition to the following alternate functions:
• Peripheral UART RX (PUART_RX)
• MOSI (master and slave) for SPI_2.
You want to remap in firmware the EEPROM write protection function from P1 to P4.
Is this correct? If yes, why is this needed?
I don't think this will be supported as it would require firmware modifications outside the scope of these forums.
Yes, we want to remap in firmware the EEPROM write protection function from P1 to P4.
Because we assign the
P0 -> SPI_CLK
P1 -> SPI_MISO
P2 -> SPI_MOSI
P3 -> SPI_CS
That's why we move the P1 to P4 and we are not using the SiP module. Do you have any suggestion?
Your requirement will need significant changes to our firmware. Unless there are compelling reasons, it is not recommended. Where are you located? I would like to get a local representative to speak to you.
I locate in Taipei, Taiwan.
Who is the distributor supporting your COB design? Please contact them for support.