This content has been marked as final.
Show 2 replies
-
1. Re: Offset in some DQ bits of the FX3 (CYUSB3KIT-003)
villanueva.jos_3207616 May 26, 2018 12:28 PM (in response to villanueva.jos_3207616)Some details: The master is a FPGA, It reads data from FX3 using the DMA_ready flag. At the moment it's only a reading test. The FPGA reads "correctly" with an offset in some bits.
-
2. Re: Offset in some DQ bits of the FX3 (CYUSB3KIT-003)
villanueva.jos_3207616 May 29, 2018 2:39 AM (in response to villanueva.jos_3207616)I removed the J5 jumper and all signal are correct. So it is recomended not connect the jumper if don't work with the SRAM