1 Reply Latest reply on May 25, 2018 3:11 AM by SrinathS_16

    About read for FX2 Endpoint0

    hiyac_351831

      I checked document, #001-13670 EZ-USB Technical Reference Manual.
      http://www.cypress.com/file/126446/download

       

      I am question about Figure 9-1 at see page 99.

       

      Question:
      Could you tell me FPGA can read data from the CPU EP0?
      I understand for readable EPx is EP2, EP4, EP6, EP8.

       

       

      Best Regards.