It appears like a bug in our component customizer (the diagram shown is wrong). Thanks for pointing it out - I will file a defect ticket to get it corrected.
The behavior of the TCPWM block in Pseudo random mode can be understood from the Device Architecture TRM (Section 27.3.6).
In summary, the PRS mode does not use the period register to reset the counter. The period register is only used to generate an interrupt (TC) when the counter equals the period register value. The counter uses either a 16-bit or a 32-bit LFSR (depending on the resolution selected) to determine the next counter value (thus giving the counter a Pseudo random nature). The compare operation simply sets the output if the current counter value is less than the compare value and clears otherwise - thus giving the output waveform a pseudo random nature.
Let me know if this helps or if you have further queries.
Meenakshi Sundaram R