1. For DFP with CCG5 Notebook reference firmware, you shall check whether the CCG5 example firmware based on which schematic. Since for the Host end, typically, it need support USB3.0 and DisplayPort. And which pin assignment is you are designing. If you are confirmed above information and make sure it is correct. Please kindly upload CC negotiation log in this threads.
2. For UFP with CCG5 Notebook reference firmware, you need make sure the DP sink function have already enabled or not.
3. The best way to debug is, use DFP and UFP on market (for example, some Type-C Notebook, or Type-C C to DP dongle) to test your design, so that you can find out the root cause one by one.
1. We have used the schematic reference for CCG1. The host end has support for USB 3.0 and DP. We have validated that by using our core in another development board without the Type C capabilities. In the DFP we are using the K7 (HPD_1) as an output from the controller and input to our core. The CC lines are an input to the core from the Type C connector. The connection is just the opposite on the UFP board. The HPD is an input to the controller and output from our core. How do I get the CC negotiation logs? I don’t have the CY 4500.
2. How to enable the DP sink function? Is there any macro related to that? The only macro which I found of interest was the “DP_DFP_SUPP” and “DP_UFP_SUPP”. I tried enabling them individually for either sides.
3. We are testing using a Type C monitor on DFP side and a Type C notebook on the UFP side.
Please note that in our application we have separate boards as DFP and UFP. On the DFP side our core is acting as a host and on the UFP side our core is acting as a device.
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