3 Replies Latest reply on May 29, 2018 1:40 AM by zzz_3221081

    FR60 I-Cache issues ?

    zzz_3221081

      I'm having a question about the FR60 MCU, inherited from Fujitsu.

      Specifically, I am dealing with a part of the MB91460 series.

      When enabling the I-Cache, the application supposedly loses messages on the CAN bus.

      According to the datasheet (HW-Manual), only external memory (i.e. on the external bus) can be cached, so I preclude effects on peripheral registers at this point.

       

      Is there any issues with this family's I-Cache known ?

      A search for concerning errata yielded no results.

       

       

      And, to add a follow-up question:

      The document" MB91460 Series User’s Manual", Version 1.10, 2007-03-09 (Fujitsu document), section 12, "Instruction Cache", states there is an cache for external memory. Section 12.4, "Cacheable areas in the instruction cache" says: "The instruction cache can cache data only in external bus space."

      The problem is:

      This document/section also describes configuration registers (ISIZE at 0x000003C7, ICHCR at 0x000003E7), which do not show up in the datasheet, neither Fujitsu's last version, nor the latest Cypress version. These peripheral register address range is marked as reserved there (0x000394..0x0003EC). And to add to the confusion, the configurable sizes for _this_ cache (1k, 2k, 4k, off) are different from those of the internal Flash cache (off, 4k, 8k, 16k).

      Can somebody shed some light on this issue ?

       

      Update: using dhe Accemic MDE 2006 debugger, the ICHCR and ISIZE registers show up in the IO space at the proper addresses, but contain 0xFF and cannot be changed.

       

      Thanks.

        • 1. Re: FR60 I-Cache issues ?
          zzz_3221081

          The document" MB91460 Series User’s Manual", Version 1.10, 2007-03-09 (Fujitsu document), section 12, "Instruction Cache", states there is an cache for external memory. Section 12.4, "Cacheable areas in the instruction cache" says: "The instruction cache can cache data only in external bus space."

          At least this issue is cleared with the latest version of hardware manual.

          There is no cache for external memory implemented for the 467D variant. The old version was not clear about that.

          • 2. Re: FR60 I-Cache issues ?
            zzz_3221081

            Hmmmm, perhaps there is no issue known ...

            And I cannot reproduce the issue either. I don't notice any negative side effects with enabled caches.

             

             

            But to add still another follow-up:

            Has anyone a description of the full chip designation for the MB91F46x ?

            Those full designations use to encode temperature class, casing, manufacturing place and time, and, most importantly, chip revision.

             

            To give two examples of actual chips:

             

            1.

            MB91F467DA

            0722         Z03

            GS             E2

             

            and 2.

            MB91F467DB

            1142         Z58

            GS             E2

             

            What is the difference between both chips ?

            I checked both the last Fujitsu documentation (still named "preliminary") and the latest Cypress datasheets, but did not find anything in this regard.

            • 3. Re: FR60 I-Cache issues ?
              zzz_3221081

              Somebody supposedly moved this question to the "MCU->Auto MCU" section, not sure how that seems more appropriate ...

               

              However, I'm in contact with a Cypress representative directly regarding this issue, and currently wait for a full errata list.