Please share the schematic for the circuit.
Also tell which FW example you are using for developing your application?
Thanks & Regards
Checkpoints to consider:
1) The FPGA should select proper address lines for write socket. I believe in your project, FX3 has two DMA channels one to read data from fpga and one to write.
Assume that the DMA channel for FPGA to FX3 has PIB socket 0. The fpga should select address lines ADDR[1:0] as 00. (both lines driven low)
2) Also, make sure you send so much data enough to fill FX3's DMA buffer. (Or make sure PKTEND signal is asserted for short DMA transfer)
3) Take a scope of FPGA signals and verify everything is OK.