3 Replies Latest reply on Apr 25, 2018 4:37 AM by himam_31

    PSoC5LP bootloader with SPI transport



      I'm trying to get bootloader with SPI transport to work. I have something that usually works, but it's very fragile - basically the PSoC bootloader logic doesn't handle extra bytes in the communication very well.


      The issue with SPI (vs UART) is that the host need to send data in order to read data from the slave (=PSoC). This data ends up in the incoming buffer on the PSoC side, and the bootloader will fail when it contains unexpected data. We have tried to send 0x00 and 0x01 from the host as dummy data (while reading data from the slave), but in both cases it fails.


      The bootloader protocol should allow both these numbers as 'dummy data' that is thrown away - the bootloader doesn't seem to have proper parsing (that is, erroneous data in the incoming buffer should be thrown away).


      Our current 'solution' is having sleeps here and there in the host code that make sure that we only read when the PSoC is ready. However, this is very error-prone and slow.


      Is there a solution to this? I know I can fix it on the PSoC side by overriding CyBtldrCommWrite, parse the data received and only deliver it to the bootloader logic in case it's valid bootloader protocol data - but should I really have to do that? It really should be handled by the bootloader internally.


      Thanks, Jacob