3 Replies Latest reply on May 8, 2018 5:19 PM by NileshB_06

    A single bit overwritten issue in non-targeted words in Async SRAM

      Hello,

       

      I am new to this forum and I am a developer who is self-taught.

       

      Recently I have some problem with some MCU boards interfacing with CY7C1061GE (1M x 16 bit, TSOP Async SRAM). In my memory test program, it was found that a single bit in ALL the other non-targeted words are toggled together the same bit of the targeted word (to the same sense). I could not think of a possibility/combination that how can it be caused by external wiring problem. Visual checks on the pins did not show any obvious soldering fault too.

       

      Please enlighten me on any pin-fault that could cause this or if this is a problem on the Chip itself.

       

      Thank you very much.

       

      ST Goh

        • 1. Re: A single bit overwritten issue in non-targeted words in Async SRAM
          PradiptaB_11

          Hi ST Goh,

           

          Can you provide us with more details on this issue.

          1) Can you share the schematics of the SRAM. Also pics of the board will help us identify soldering faults if any.

          2) Can you also give more details on the failure. ( Test code, expected result and the result that you get )

           

           

          Thanks,

          Pradipta.

          • 2. Re: A single bit overwritten issue in non-targeted words in Async SRAM

            Hi Pradita,

             

            Please find my responds to your questions:

             

            1)

             

            Sketch of the schematics: image2.jpeg

             

            and pics of the board: image1.jpeg

             

            Please note that I have the boards manufactured in bulk by a professional PCB maker. Sample and test of recent produced boards, about 10 out of 20 failed the memory test, that led us to think it could be a board production issue. But somehow the overwriting of a single bit in every other word somehow does not concur to that notion because I could not reason nor simulate how a single pin failure can lead to that pattern.

             

            2) Test procedures is as follow:

             

            a) I test all the Data lines by walking 1 through the 16 bits, writing a word and read it back on a single address in 16bit word. It passed this test.

            b) Then the address lines are tested, by first populating the 16-bit word with pattern 0xAAAA, then write 0x5555 to any single word, and check the next address (e.g. write 0x5555 to address 0x60000000, and check address 0x60000002) if pattern 0xAAAA is still there. The board failed this part of the test, as 0xAAAA became 0xA2AA, but 0x5555 was successfully written to the designated address. The same failure repeats on other addresses as well. With debugger I did a check on on the other words of the SRAM I found the bits in all other words toggle whenever I manipulate the data in any word.

             

            So the question is whether this could be a chip failure or wiring problem? I am not familiar with VLSI design but I read something about Coupling Failure which seems to be the symptom I am facing.

             

            Hope my reply meet your expectations. Thank you.

             

            Best Regards,

            ST

            • 3. Re: A single bit overwritten issue in non-targeted words in Async SRAM
              NileshB_06

              Hi ST Goh,

              Is it possible for you to scope out with an Oscilloscope the IO which is showing this behavior?

              I believe it is IO11 (IO15 down to IO0) which appears to be stuck at 0?

              What is the write/read cycle of the test?

              Are you seeing a failure only from 1--> 0? Or some times 0 --> 1?

               

              Regards,

              Nilesh