1 2 Previous Next 16 Replies Latest reply on Dec 7, 2018 7:09 PM by JiPa_1592676 Branched to a new discussion.

    Cypress CYW920719Q40-B1 eval kit debugging

      Hello,

       

      I'm new to the Cypress MCU world... I purchased a couple of CYW920719Q40-B1 eval kits. I managed to build and download a few of the samples onto the board... Can anyone please tell me how I can now begin to step debug through code/firmware that I download to them in WICED v6.1?

       

      Additionally, is there any additional equipment I need?

       

      Thanks

       

      Steve Tigher

        • 1. Re: Cypress CYW920719Q40-B1 eval kit debugging
          BoonT_56

          You may refer to "support-debugging...".pdf in the doc folder under the /doc folder in the sdk. The recommeded equipment to use is described in section 3 of the same doc.

          1 of 1 people found this helpful
          • 2. Re: Cypress CYW920719Q40-B1 eval kit debugging

            Hello,

             

            I received your response and read through Debugging-Support-Using-J-Link.pdf in the doc folder under the /doc folder of the sdk as you suggested. However, that document references the CYW920707V2_EVAL board and not the CYW920719Q40-B1 eval kits that I have. e.g. the doc talks about a J27 connector which the CYW920719Q40-B1 eval kits do not have. So i'm still not able to debug my eval kits...

            hardware-reqs.png

            The CYW920719Q40-B1 eval kits have a 10-pin SWD connector, can this be used to connect directly to an external J-Link, and if so how?

            hardware-reqs-02.png

            I'm not a hardware guy (primarily firmware) and need some simple instructions on how to go about debugging my CYW920719Q40-B1 eval kits.

             

            Please help!!

             

            Thanks,

            1 of 1 people found this helpful
            • 3. Re: Cypress CYW920719Q40-B1 eval kit debugging
              BoonT_56

              I think you are probably accessing it in the 20706 project. You should read this title in the 20719 project. But this document may need to be updated to the current Q40EVB-01 version, which is the board that you are using.

              • 4. Re: Cypress CYW920719Q40-B1 eval kit debugging

                Hello,

                 

                No, I am accessing the file that you guided me to... Under Wiced Studio v6.1 the directory structures (on Windows) are as follows:

                4-17-2018 8-30-00 AM.png

                #1 - sdk folder

                 

                4-17-2018 8-30-27 AM.png

                #2 - /Doc folder

                 

                So as you can see, there is a single Debugging-Support-Using-J-Link.pdf in the doc folder for all the boards (and the device folders simply contain the API html documentation).  Nonetheless, as I indicated in my previous response, the CYW920719Q40-B1 eval kit is not referenced in that document.

                 

                Please provide details of how I can get debugging to work on the CYW920719Q40-B1 eval kit and the steps I need to take (hardware setup) to get there.

                 

                Please help!

                 

                Thanks

                • 5. Re: Cypress CYW920719Q40-B1 eval kit debugging
                  MichaelF_56

                  What about this document?

                   

                   

                  saching_06

                  • 6. Re: Cypress CYW920719Q40-B1 eval kit debugging

                    No, unfortunately that document doesn't help. As stated in this forum thread by another user it is for the CYW920719WCDEVAL dev board and NOT the CYW920719Q40-B1 eval kit that I am using. Both boards have different interfaces.

                     

                    I understand that the CYW920719Q40-B1 eval kit is a fairly new board to Cypress but there must be some stated steps that will allow me to get simple debugging to work on it?

                     

                    Please help!

                     

                    Regards,

                     

                    BoonT_56MichaelF_56 saching_06

                    • 7. Re: Cypress CYW920719Q40-B1 eval kit debugging
                      MichaelF_56

                      I will look into this internally.  It looks like this was designed to support our prior board, not the current one.

                      • 8. Re: Cypress CYW920719Q40-B1 eval kit debugging
                        saching_06

                        Hi Steve,

                         

                        You are absolutely right. This document is based on an old (and internal) board that we do not sell. Technically, document is good for any of the Bluetooth boards as we use SWD lines for debugging on these. Only piece missing is what additional cable/connector to buy that connects mentioned debugger to a 10-pin connector on the CYW920719Q40EVB-01. This document needs to be updated with all this info and new board details. I am adding some more people who will be able to provide specific details for time being. Thanks again for patience!

                         

                        Thanks

                        Sachin

                         

                        SrikanthN_96 VikramR_26 RickS_01

                         

                        cc: MichaelF_56

                        1 of 1 people found this helpful
                        • 9. Re: Cypress CYW920719Q40-B1 eval kit debugging
                          SrikanthN_96

                          Hi,

                           

                          We are working to add more details and update debugger guide to be generic, which can be available in upcoming WICED release.

                          For time being, if you are facing issues RanjithK_41 can help on how to make it work.

                          • 10. Re: Cypress CYW920719Q40-B1 eval kit debugging
                            RanjithK_41

                            Hi Steve,

                             

                            Please follow the procedure below for JTAG-SWD debugging in CYW920719Q40EVB-01

                            Install

                            https://www.segger.com/downloads/jlink/JLink_Windows.exe

                             

                            I have attached a sample application in this post.

                             

                            Please remember not to use PUART and SWD at the same time if the lines are shorted in the schematics. In case of CYW920719Q40EVB-01, P33 and P34 are respectively used for SWDCK/PUART_TXD and SWDIO/PUART_RXD.

                            Comment the PUART part in your application and also remove the jumpers connecting PUART in the evaluation board.

                             

                            Please change the include/20719/internal/gpiofunction.h to the example attached in this post (new_swd_gpio).

                             

                            For wiced 6.1

                            Include the following snippet in your application. Make sure you use specify the pins correctly.

                             

                            //The following also should work.

                            #include "wiced_hal_gpio.h"

                            #include "gpiofunction.h"

                             

                            void _tx_v7m_set_int(unsigned int posture);

                            unsigned int _tx_v7m_get_int(void);

                             

                            /// When debugging is enabled, sets up the HW for debugging.

                            #define SETUP_APP_FOR_DEBUG_IF_DEBUG_ENABLED() do{          \

                            wiced_hal_gpio_select_function(WICED_P10, SWDIO); \

                            wiced_hal_gpio_select_function(WICED_P11, SWDCK); \

                            wiced_hal_wdog_disable(); \

                            }while(0)

                            /// Optionally waits in a pseudo while(1) until the user allows the CPU to continue

                            #define BUSY_WAIT_TILL_MANUAL_CONTINUE_IF_DEBUG_ENABLED() do{    \

                            volatile UINT8 spar_debug_continue = 0;\

                            unsigned int interrupt_save = _tx_v7m_get_int();\

                            while(!spar_debug_continue)       \

                            ; \

                            spar_debug_continue = 0; \

                            _tx_v7m_set_int(interrupt_save);        \

                            }while(0)

                             

                             

                            In application_start or button interrupt hanlder use this

                            SETUP_APP_FOR_DEBUG_IF_DEBUG_ENABLED();

                            BUSY_WAIT_TILL_MANUAL_CONTINUE_IF_DEBUG_ENABLED();

                             

                             

                            Download the code with DEBUG=1 ain the make target and in makfile.mk file use C_FLAGS += -DDEBUG

                             

                            There are 10 pin and 20 pin JTAG/SWD interfaces available in the market.

                             

                            Connect 4 pins.

                            Vref(1), SWDIO(2), SWDCK(4), GND(3)  in 10 pin adapter.

                            Vref(1), SWDIO(7), SWDCK(9), GND(20)  in 20 pin adapter.

                             

                            concortex10pindesc.png20pin.png

                            And connect the jtag adapter to PC. Even if it is plugged in before, no worries.

                            Make sure you give the correct pins for SWDIO and SWDCK in the code above.

                             

                            Start the jlink GDB server. The following window shows up.

                            jlink gdb server.png

                            Then Click ok.

                            waiting.png

                            It will display "waiting for GDB connection"

                             

                            In wiced, go to Debug Configurations. Make sure you see the following configurations. You can see by default, it debugs last_built.elf from the build folder of wiced. Choose your respective chip(20719-B1) and OS.

                            Debug config.png

                             

                            Click debug and then click yes to open debug perspective in wiced.

                            PERSPECTIVE.png

                             

                            debugging.png

                            You need to change spar_debug_continue value in the variables window of wiced to be non-zero in memory to continue and debug further with breakpoints.

                             

                            If you are facing any issues in Windows 10 or earlier causing driver issue. Please follow these links.

                            JTAG SWD Driver issue in windows 10 Follow this. Remember to check "confirm device drivers also" when uninstall device

                             

                            https://gojimmypi.blogspot.in/2017/03/Segger-J-Link-STM32-with-VisualGDB.html

                             

                            https://sysprogs.com/w/forums/topic/segger-j-link-no-emulators-connected-via-usb-after-configuring-for-openocd/

                             

                            Thanks,

                            Ranjith.

                            2 of 2 people found this helpful
                            • 11. Re: Cypress CYW920719Q40-B1 eval kit debugging

                              RanjithK_41

                              Thank you for your detailed response, however things are not working for me and I am still unable to debug the CYW920719Q40EVB-01 board that I purchased...

                               

                              Here is the step-by-step log of my progress:

                               

                              1- So that no issues were introduced, I simply downloaded the swd_gpio.zip file that you attached and extracted the hal_gpio.c & makefile.mk files contained within it.

                               

                              2- I included the DEBUG=1 directive on the target line

                               

                              3- Invoking the Build Target command produced compilation errors as follows:

                               

                              initial compilation errors

                              14:45:47 **** Build of configuration Release for project 20719-B1_Bluetooth ****

                              "D:\\Development\\IDEs\\WICED-Studio-6.1\\20719-B1_Bluetooth\\make.exe" snip.hal.gpio-CYW920719Q40EVB_01 DEBUG=1 download

                              Compiling hal_gpio.c

                              In file included from ../apps/snip/hal/gpio/hal_gpio.c:56:0:

                              ../include/20719/internal/gpiofunction.h:109:14:

                              error: nested redefinition of 'enum GPIO_STATUS_e'

                              typedef enum GPIO_STATUS_e

                                            ^

                              ../include/20719/internal/gpiofunction.h:109:14: error: redeclaration of 'enum GPIO_STATUS_e'

                              In file included from ../apps/snip/hal/gpio/hal_gpio.c:49:0:

                              ../include/20719/hal/wiced_hal_gpio.h:271:14: note: originally defined here

                              typedef enum GPIO_STATUS_e

                                            ^

                              In file included from ../apps/snip/hal/gpio/hal_gpio.c:56:0:

                              ../include/20719/internal/gpiofunction.h:111:5: error: redeclaration of enumerator 'GPIO_FAILURE'

                                   GPIO_FAILURE,

                                   ^

                              In file included from ../apps/snip/hal/gpio/hal_gpio.c:49:0:

                              ../include/20719/hal/wiced_hal_gpio.h:273:5: note: previous definition of 'GPIO_FAILURE' was here

                                   GPIO_FAILURE, //!< The requested pin and function mapping is not supported by hardware

                                   ^

                              In file included from ../apps/snip/hal/gpio/hal_gpio.c:56:0:

                              ../include/20719/internal/gpiofunction.h:112:5: error: redeclaration of enumerator 'GPIO_SUCCESS'

                                   GPIO_SUCCESS,

                                   ^

                              In file included from ../apps/snip/hal/gpio/hal_gpio.c:49:0:

                              ../include/20719/hal/wiced_hal_gpio.h:274:5: note: previous definition of 'GPIO_SUCCESS' was here

                                   GPIO_SUCCESS, //!< The requested pin and function mapping is complete, The pin was previously not used and the function was previously not mapped

                                   ^

                              In file included from ../apps/snip/hal/gpio/hal_gpio.c:56:0:

                              ../include/20719/internal/gpiofunction.h:113:5: error: redeclaration of enumerator 'GPIO_REMAPPED'

                                   GPIO_REMAPPED,

                                   ^

                              In file included from ../apps/snip/hal/gpio/hal_gpio.c:49:0:

                              ../include/20719/hal/wiced_hal_gpio.h:275:5: note: previous definition of 'GPIO_REMAPPED' was here

                                   GPIO_REMAPPED,//!< The requested pin and function mapping is complete, The pin was previously used by another function, that function was disabled and the new function applied

                                   ^

                              In file included from ../apps/snip/hal/gpio/hal_gpio.c:56:0:

                              ../include/20719/internal/gpiofunction.h:114:5: error: redeclaration of enumerator 'GPIO_MOVED'

                                   GPIO_MOVED

                                   ^

                              In file included from ../apps/snip/hal/gpio/hal_gpio.c:49:0:

                              ../include/20719/hal/wiced_hal_gpio.h:276:5: note: previous definition of 'GPIO_MOVED' was here

                                   GPIO_MOVED    //!< The requested pin and function mapping is complete, The requested function was already mapped to a different pin, that pin was disabled and the function moved to the new pin

                                   ^

                              make.exe[1]: *** [../build/gpio-CYW920719Q40EVB_01-rom-ram-Wiced-release/hal_gpio.o] Error 1

                              makefile:437: recipe for target '../build/gpio-CYW920719Q40EVB_01-rom-ram-Wiced-release/hal_gpio.o' failed

                              make: *** [snip.hal.gpio-CYW920719Q40EVB_01] Error 2

                              Makefile:382: recipe for target 'snip.hal.gpio-CYW920719Q40EVB_01' failed

                               

                              14:45:48 Build Finished (took 1s.188ms)

                               

                              4- After making the following changes to gpiofunction.h, everything compiled correctly...

                               

                              patches required for successful compilation of sample code provided

                              - #include "gpiodriver.h"

                              + #include "wiced_hal_gpio.h"

                               

                              /* steve.tigher - start

                              -typedef enum GPIO_STATUS_e

                              -{

                              -    GPIO_FAILURE,

                              -    GPIO_SUCCESS,

                              -    GPIO_REMAPPED,

                              -    GPIO_MOVED

                              -} GPIO_status_t;

                              steve.tigher - end */

                               

                              // Assign the requested function to the requested GPIO

                              - GPIO_status_t gpio_function_Set_GPIO_Function(wiced_bt_gpio_numbers_t gpio, function_numbers_t newfunction);

                              + wiced_bt_gpio_select_status_t gpio_function_Set_GPIO_Function(wiced_bt_gpio_numbers_t gpio, function_numbers_t newfunction);

                               

                              5- Code successfully compiled and downloaded to the CYW920719Q40EVB-01 board

                               

                              code downloaded to CYW920719Q40EVB-01 eval board

                              15:04:44 **** Build of configuration Release for project 20719-B1_Bluetooth ****

                              "D:\\Development\\IDEs\\WICED-Studio-6.1\\20719-B1_Bluetooth\\make.exe" snip.hal.gpio-CYW920719Q40EVB_01 DEBUG=1 download

                              Compiling hal_gpio.c

                              Compiling lib_installer.c

                              Linking target ELF

                              ..\..\43xxx_Wi-Fi\tools\ARM_GNU\bin\Win32\arm-none-eabi-ld: Warning: type of symbol `' changed from 2 to 1 in internal/20719B1//patches/patch.elf

                              OK, made elf.

                              ..\..\43xxx_Wi-Fi\tools\ARM_GNU\bin\Win32\arm-none-eabi-objdump: section '.ordered' mentioned in a -j option, but not found in any input file

                              ..\..\43xxx_Wi-Fi\tools\ARM_GNU\bin\Win32\arm-none-eabi-objdump: section '.aon' mentioned in a -j option, but not found in any input file

                              ..\..\43xxx_Wi-Fi\tools\ARM_GNU\bin\Win32\arm-none-eabi-objdump: section '.pram_rodata' mentioned in a -j option, but not found in any input file

                              Call to gpio_spar_crt_setup @ 00215791

                              OK, made D:/Development/IDEs/WICED-Studio-6.1/20719-B1_Bluetooth/WICED/../build/gpio-CYW920719Q40EVB_01-rom-ram-Wiced-release/A_20719B1-gpio-rom-ram-spar.cgs. MD5 sum is:

                              6a9bc84ed70be41c59896f0ab3483293 *../build/gpio-CYW920719Q40EVB_01-rom-ram-Wiced-release/A_20719B1-gpio-rom-ram-spar.cgs

                               

                              --------------------------------------------------------------------------------

                              Patch code starts at              0x00270400 (RAM address)

                              Patch code ends at                0x00279BE4 (RAM address)

                              Patch RW/ZI size                  2340 bytes

                              Application starts at             0x00215514 (RAM address)

                              Application ends at               0x00215790 (RAM address)

                               

                              Patch code size                        38884 bytes

                              Application RAM footprint                636 bytes

                                                                    ------

                              Total RAM footprint                     2976 bytes (2.9kiB)

                              --------------------------------------------------------------------------------

                               

                              Converting CGS to HEX...

                              Conversion complete

                               

                              Creating OTA images...

                              Conversion complete

                              OTA image footprint in NV is 45906 bytes

                               

                              Detecting device...

                              Device found

                               

                               

                              Downloading application...

                              Download complete

                               

                              Application running.

                               

                              15:05:03 Build Finished (took 18s.674ms)

                               

                              6- Due to the following definitions in the sample code provided by Cypress, I proceeded as follows:

                               

                              GPIO definitions in Cypress provided sample code

                              /// When debugging is enabled, sets up the HW for debugging.

                              #define SETUP_APP_FOR_DEBUG_IF_DEBUG_ENABLED()   do{          \

                                      gpio_function_Set_GPIO_Function(WICED_P38, SWDIO); \

                                      gpio_function_Set_GPIO_Function(WICED_P28, SWDCK); \

                              CYW920719Q40EVB-01-swd-pin-connections.jpg

                              a. On J10 - I removed the jumpers from the RX and TX PUART

                              b. On J3 - I connected J3-5 (D13) to the SWDIO (pin 2) on the Cortex-M 10 pin connector

                              c. On J3 - I connected J3-7 (D11) to the SWDCLK (pin 4) on the Cortex-M 10 pin connector

                              d. TP12 was then wired to the VTref (pin 1) on the Cortex-M 10 pin connector

                              e. On J3 - I connected J3-4 (GND) to GND (pin 3) on the Cortex-M 10 pin connector

                               

                              As required, both the CYW920719Q40EVB-01 board and the JLink were connected via USB to the Windows 10 host computer

                               

                              7- I then proceeded to start the JLink GDB server as instructed, with the following parameters and results:

                              4-18-2018 9-23-04 PM.png

                               

                              4-18-2018 9-23-18 PM.png

                              From the above, I can see that the JLink is detecting a Target Voltage of 3.30V on the board but a connection error then ensues.

                               

                              Please note that all the steps above were done using 3 different JLinks, with 2 different CYW920719Q40EVB-01 boards and changing out the USB cables and 10-Pin connector cables as well to isolate any defective parts. I also did the above on 2 different Windows 10 computers and with JLink v6.30g as well with the same results.

                               

                              As you can see, I have gone through great lengths to try to get this to work. Any help that you can provide to highlight where the issue is would be very much appreciated!!

                               

                              Please help!!

                               

                              btta mifo sgup sirk vikr risc

                              • 12. Re: Cypress CYW920719Q40-B1 eval kit debugging
                                RanjithK_41

                                Hi Steve,

                                The changes in the "gpiofunction.h" is correct.

                                The wire connections are also correct.

                                 

                                Is your wiced version Wiced_006.001.000.0085? You can find it in version.txt which is in the outer most directory of the project.

                                Can you please recheck if there are any driver issues? Because I faced the driver issues when moving from Windows 7 to Windows 10.

                                 

                                Thanks.

                                1 of 1 people found this helpful
                                • 13. Re: Cypress CYW920719Q40-B1 eval kit debugging
                                  BoonT_56

                                  Actually I managed to bring it up. See the pixs:

                                   

                                  jtag.jpg

                                   

                                  20719.jpg

                                  2 of 2 people found this helpful
                                  • 14. Re: Cypress CYW920719Q40-B1 eval kit debugging
                                    BoonT_56

                                    I referred to the user manual of Jlink from Segger (UM08001_JLink.pdf), chapter 16.1.2 Pinout for SWD, my connections

                                    on the Jlink device are as below:

                                     

                                    Pin 1 (VTref) is connected to VDDIO (evb)

                                    Pin 7 (SWDIO) is connected to D13

                                    Pin 9 (SWCLK) is connected to D11

                                    Pin 4 (GND) is connected to GND

                                    1 of 1 people found this helpful
                                    1 2 Previous Next