3 Replies Latest reply on Apr 16, 2018 11:33 PM by WinstonF_61

    WICED CYW20719-B1: How to reduce the GPIO output current leak

    LixinD_46

      Hi Team,

       

      After configured a GPIO pin (such as P13) as "GPIO_INPUT_ENABLE | GPIO_OUTPUT_ENABLE" and the default value set to "GPIO_PIN_OUTPUT_HIGH",

      then another MCU tried to control the configured GPIO and put it down to the ground as an input to the CYW20719-B1, we can find that the current leak is ~21.5mA.

      It's too high.

      So, without adding any external resistors, is there any method to reduce the current leak by configuring in the FW internally, just as the PSoC do (such as configured as internal pull up output)?

      And one more question, are there pull up and pull down internal resistors for all GPIO? if so, what is the exact value of these internal pull up and pull down resistors?

       

      Thanks,

      Dudley