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1. Re: MISO pin behaving abruptly during SPI communication
user_418894472 Mar 22, 2018 7:42 AM (in response to user_418894472)Just noted that after enabling the "median filter" in the slave SPI module, data corruption stops. (Although the MISO signal still goes high impedance after SS release but it does not latch up during active SS period)
What is "median filter"? Why is it needed?
The master SPI is made from 8-bit UDB and takes input from 2MHz clock. The slave SPI is a SCB implementation and data rate is set to 1Mb/s.
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2. Re: MISO pin behaving abruptly during SPI communication
bob.marlowe Mar 22, 2018 8:56 AM (in response to user_418894472)Can it be that you are working on a Cypress development kit and your pin is connected to a capacitor on the pcb?
Check with Kit schematics.
Bob