2 Replies Latest reply on Mar 22, 2018 8:56 AM by JoMe_264151

MISO pin behaving abruptly during SPI communication

MrMa_286121 Mar 22, 2018 7:21 AM

Hi!

I have a project in which an SPI master sends four continuous bytes of data to an SPI slave. All four bytes are transferred in one-go without releasing the SS pin. The SS pin is released high after all four bytes are transferred.

The input from the ,master is received correctly by the slave via MOSI pin. However the MISO pin gets glued to high position randomly and corrupts the slave output data. It also appears that the MISO pin goes to high impedance after the SS pin is released. (MISO output voltage slowly ramps down to 0V from initial 5V when SS pin is released)

(Blue = MISO. Yellow = SS)

Please help

1. Re: MISO pin behaving abruptly during SPI communication

MrMa_286121 Mar 22, 2018 7:42 AM (in response to MrMa_286121)

Just noted that after enabling the "median filter" in the slave SPI module, data corruption stops. (Although the MISO signal still goes high impedance after SS release but it does not latch up during active SS period)
What is "median filter"? Why is it needed?
The master SPI is made from 8-bit UDB and takes input from 2MHz clock. The slave SPI is a SCB implementation and data rate is set to 1Mb/s.
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2. Re: MISO pin behaving abruptly during SPI communication

JoMe_264151 Mar 22, 2018 8:56 AM (in response to MrMa_286121)

Can it be that you are working on a Cypress development kit and your pin is connected to a capacitor on the pcb?
Check with Kit schematics.

Bob
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