Intel Altera FPGA configuration support

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Anonymous
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Hello,

I am wondering if anyone has verified in hardware any of the newer NOR flash devices for Intel/Altera FPGA configuration.  We are using the MAX V parallel flash loader to configure an Arria 10.  I am looking at the quad SPI S25FL-S or S25FS-S series in particular or perhaps one of the Burst NOR flash devices.  I believe these should be faster than the S29GL-S that Altera shows in their user guide as being compatible.  Fast configuration time is important to our application. 

Thanks,

James

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1 Solution
ZhiF_31
Employee
Employee
25 sign-ins 10 solutions authored 5 solutions authored

Hi James,

It seems you are using the MAX V to do passive configuration, whether with SPI NOR or Parallel NOR flash. I have seen customers who implemented such scheme with S29GL-S or S29GL-T devices, i.e. Parallel NOR. For SPI NOR, such as S25FL-S or S25FS-S, most customers use them in Active Serial (AS) configuration scheme, without the MAX V CPLD. But certainly they can be used with the MAX V also as long as the CPLD can read out data from the SPI NOR.

Regarding to the speed, you may need to do some calculations based on your particular system to see what the maximum read throughput you can achieve. For SPI NOR, it mainly depends on the clock speed and number of IO you are using. For Parallel NOR, it depends on whether you can make use of the Page Read function that reduces the initial access time for each read.

Hope this helps a little bit in your consideration.

Thanks,

Zhi

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1 Reply
ZhiF_31
Employee
Employee
25 sign-ins 10 solutions authored 5 solutions authored

Hi James,

It seems you are using the MAX V to do passive configuration, whether with SPI NOR or Parallel NOR flash. I have seen customers who implemented such scheme with S29GL-S or S29GL-T devices, i.e. Parallel NOR. For SPI NOR, such as S25FL-S or S25FS-S, most customers use them in Active Serial (AS) configuration scheme, without the MAX V CPLD. But certainly they can be used with the MAX V also as long as the CPLD can read out data from the SPI NOR.

Regarding to the speed, you may need to do some calculations based on your particular system to see what the maximum read throughput you can achieve. For SPI NOR, it mainly depends on the clock speed and number of IO you are using. For Parallel NOR, it depends on whether you can make use of the Page Read function that reduces the initial access time for each read.

Hope this helps a little bit in your consideration.

Thanks,

Zhi

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