4 Replies Latest reply on Mar 28, 2018 1:40 AM by bernard.durand_1475926

    Spurious results on a periodmeter using  Timer capture on PSOC5 LP

    bernard.durand_1475926

      Hi,

      It’s my first post . I’m having trouble with a periodmeter on PSOC5 LP, on a cy8ckit-059 kit.

       

      The input square wave is on the capture input of Timer_1.

      The period is calculated as the difference between 2 successive values of the capture register of Timer_1.

      The result is used to set the value of a VDAC (full sacle = 4.080V)

      The timer clock is set to 1MHz, so for frequencies of 4kHz to 16 kHZ  (period 256µs downto 62µs) there should be no overflow of the 8 bit value of the VDAC.

       

      The result is ok, except for some spurious values, as shown on the oscillograms.

      Upper trace is the input signal ( 0..5V), lower trace is the output of de VDAC1.

       

       

      Can anyone see if I’ve done something wrong ?

      Thank you for your help

      Bernard