1 Reply Latest reply on Mar 6, 2018 6:34 PM by whao

    How to generate bin file for PSoC6 with fromelf tool in Keil?

    whao

      Anyone knows the way to generate correct bin file for PSoC6 with fromelf tool in Keil?

       

      Default configuration in Keil just can output hex file. I need to use fromelf tool to generate bin file.

       

      With some searching, I found the following command to use.

       

      >fromelf --bin --output=cm4.bin cm4.axf

       

      But it generates a folder instead of one bin file. The folder contains the following parts, looks like it needs to be combined together.

      Then I tried to use the following command.

       

      >fromelf --bincombined --output=cm4.bin cm4.axf, it does generate one bin file, but it's very big, around 128MB. I suppose this is caused by our linker file defines several discontinuous memory regions. The behaviour for --bincombined may explain this.

       

      Hao

        • 1. Re: How to generate bin file for PSoC6 with fromelf tool in Keil?
          whao

          I have found a quick solution to this problem.

           

          Actually what is output is expected based on fromelf user guide information.

           

          Considerations when using --bin

          If you convert an ELF image containing multiple load regions to a binary format, fromelf creates an

          output directory named destination and generates one binary output file for each load region in the

          input image. fromelf places the output files in the destination directory.

           

          The generated files aligns with the linker file load regions. For example, for cm4 core, the regions in MCU internal flash is as follows.

           

          LR_FLASH FLASH_START FLASH_SIZE
          {
              ER_FLASH_VECTORS +0
              {
                  * (RESET, +FIRST)
              }

              ER_FLASH_CODE +0 FIXED
              {
                  * (InRoot$$Sections)
                  * (+RO)
              }

              ER_RAM_VECTORS RAM_START UNINIT
              {
                  * (RESET_RAM, +FIRST)
              }

              ER_RAM_DATA +0
              {
                  * (.cy_ramfunc)
                  .ANY (+RW, +ZI)
              }

              ; Place variables in the section that should not be initialized during the
              ; device startup.
              ER_RAM_NOINIT_DATA +0 UNINIT
              {
                  * (.noinit)
              }

              ; Used for the digital signature of the secure application and the
              ; Bootloader SDK appication. The size of the section depends on the required
              ; data size.
              .cy_app_signature (FLASH_START + FLASH_SIZE - 256) 256
              {
                  * (.cy_app_signature)
              }
          }

           

          So what appears in the output file in cm4.bin folder has four of the regions. I just need to concatenate them together. Linux command can help achieve this easliy.

           

          $cat ER_FLASH_VECTORS ER_FLASH_CODE ER_RAM_DATA ER_RAM_NO_NOINIT > cm4.bin

           

          Then what does those .merge0 to .merge3 files mean? They are actually the same files for cm0 bin for the same four load regions if you use fromelf tool to generate bin for cm0 core. You can easily check which file relates to which regions in cm0 file based on file size. This is because cm4 axf file actually merges cm0 and cm4 image.

           

          Hao