12 Replies Latest reply on Mar 13, 2018 5:54 AM by 柏晟潘

    GPIF questions

    柏晟潘

      I'm designing 68013 interface with FPGA using GPIF. FPGA work as slave FIFO.

       

      CPU could send/read bulk data in need using GPIF

      CPU could send/read control data in need (could I use GPIF, too ?)

      FPGA could send control data by interrupt 68013.

       

      but I have some questions need to make clear before I could start

       

      1. how I could send control data using CTRL_WR wave form, like program trigger CTRL_WR waveform. CTRL data is 64 bytes. I planned to use ep1 to do this.

      2. as above how to trigger bulk transfer for FIFO_WR/FIFO_RD ?

       

      other questions:

      3. could I use FPGA to make 68013 get into low power mode, or how 68013 could get into low power mode to save power ?

      my design is send a data block to FPGA and then sleep for a while then wakeup again to transfer.

       

      4. and, any way to interrupt 68013 to trigger CTRL_RD wave form and report to CPU via USB ?

        • 1. Re: GPIF questions
          柏晟潘

          got some clue

          1. see the gpif primer we could use GPIF_SingleWordRead/GPIF_SingleWordWrite to trigger manual GPIF waveform

          and control could be a GPIO set by program to indicate data type.

          2. don't know ISR function could be used or not to handle interrupt, will check later how to enable int

          • 2. Re: GPIF questions
            srnt

            Hello,

             

            - Please note that endpoints 2,4,6,8 can be used for the GPIF interface. Endpoint 1 does not support GPIF.

            - The EZ-USB firmware can put the device into suspend mode. Writing any value to the SUSPEND register would put the device into suspend mode. There is no pin to drive the FX2LP into suspend from the FPGA. Also, make sure that the remote wake-up source is enabled.

            - The ISR functions can be used to handle interrupt. Kindly,look at the firmware examples that come up with the FX2LP DVK.

             

            Best regards,

            Srinath S

            • 3. Re: GPIF questions
              柏晟潘

              thank you very much for the detail reply.

               

              but still got some questions:

              1. when I test SRAM_GPIF firmware, I got no clue how to trigger the GPIF in a certain way

              say for a GPIF write, just send bulk data out (512 bytes or 1024bytes), don't know how many times after transfer then could successfully transfer CONTROL data to trigger GPIF, always got :

               

              CONTROL IN transfer

              CONTROL IN transfer failed with Error Code:997

               

              with delay about 3-5 seconds

               

              2. when modify SRAM_GPIF code to enable max packet size to 1024/double buffer, every bulk transfer, send CONTROL packet for the first time it will return transfer failed immediately and after that send CONTROL packet again, transfer will success. so have no clue how to stable  transfer bulk data by the demo source code. and when move the trigger code to TD_Poll() like FX back to back auto mode master.c(BTW, could not build back to back master.c), GPIF never starts. weird...

               

              3. any way, got clue from SRAM_GPIF code to send control out by sending CONTROL packet out. but still have question for sending data to ep1, any way do send config via ep1 not ep0 ? if so, could send out configs via GPIF by single step. but got no demo codes. THIS IS NOT the major problem while above 2 are.

               

              4. found might be bug for 68013 firmware loading procedure, always could not update endpoint information unless reset 68013 everytime before reprogram it.

              • 4. Re: GPIF questions
                柏晟潘

                and I have to post a complain that AN66806.zip or many sample codes could not work properly(major problem is version missmatch with the SDK)

                 

                AN66806.zip has no main.c nor gpif.c for clock divider ...

                • 5. Re: GPIF questions
                  gfoersler_2625781

                  Hello 柏晟潘  ,

                   

                  regarding the version mismatch,

                   

                  do you think this might also be the reason why the examples do not work for me?

                  After programming either the device is not found by the application examples or I get a lot of 997 errors.

                   

                  Do you have a workaround and if yes, what are you doing to make it work?

                  • 6. Re: GPIF questions
                    柏晟潘

                    hello there

                     

                    please download the latest cy3684kit_RC8.zip and install it.

                     

                    also, please note that the env setting is NOT correct so that you could not make any of the project without fixing the env (menu project->components, tab 2 and check the include/lib dir). after that we could test the demo firmware.

                     

                    did you check if you got the correct device for the latest download firmware ? please DO RESET the 68013 before reload the firmware or you will get 997.

                     

                    please check the driver with VID/PID and also better modify it back to original (blank chip) VID/PID.

                     

                    hope this could be a little help for you. (what I wanna test would not work when I tested :-( )

                    • 7. Re: GPIF questions
                      柏晟潘

                      hello

                       

                      for ep6 auto in, program:

                      initial

                      EP6FIFOCFG = 0x08; // auto in mode, disable PKTEND zero length send, byte ops
                      EP6AUTOINLENH = 0x04;
                      EP6AUTOINLENL = 0;

                       

                      in TD_Poll()

                      if (PA2 && ( GPIFTRIG & 0x80 ) &&

                          !( EP68FIFOFLGS & 0x01 ))

                      {

                          PA5 = 0;

                          if (PA6)

                          {

                              GPIFTCB1 = 0;

                              GPIFTCB0 = 64; // set length of fifo

                          }

                          else

                          {

                              GPIFTCB1 = 0x04;

                              GPIFTCB0 = 0x00;     // set length of fifo

                          }

                       

                          GPIFTRIG = GPIFTRIGRD | GPIF_EP6;  // launch GPIF FIFO WRITE Transaction from EP2 FIFO

                      }

                       

                      PA2 to trigger GPIF read waveform, and 1024 read clock were sent, but even set 1024 bulk transfer, still got 512 bytes per transfer, anything missed for the setting ?

                       

                      ------ sometimes it works and sometimes it fails... what the hack is the problem ???

                      • 8. Re: GPIF questions
                        柏晟潘

                        another problem comes out:

                         

                        gpif.png

                        gpif1.png

                        just sent 1024 bytes to ep2, and gpif triggered but ..... it did stop after 512 clocks... so FPGA will not know what data is true and what's fake.

                        picture is capture by chipscope.

                         

                        while transfer large data, below waveform sucks.

                        gpif2.png

                         

                        I don't know where could get a demo that could work properly for GPIF auto transfer with ping-pong 1024 bytes buffer.

                        this is the host transfer code:

                        bytePtr = malloc(BUFFER_SIZE);// 4M  buffer
                        //if (dataPtr && config_descriptor_in)
                        if (bytePtr)
                        {
                        for (i=0;i<BUFFER_SIZE;i++)
                        *(bytePtr+i) = i;
                        for (i=0;i<256;i++)
                        {
                        if ( (i%16)==0 ) printf("%04x: ", i);
                        printf("%02x ", (unsigned char)bytePtr[i]);
                        if ( ((i+1)%16) == 0) printf("\n");
                        }
                        system("date +%H:%M:%S.%N");
                        for (i=0;i<20;i++)// 80MB transfer
                        device_send_data(dev_handle, bytePtr, BUFFER_SIZE);
                        system("date +%H:%M:%S.%N");
                        free(bytePtr);
                        }
                        • 9. Re: GPIF questions
                          柏晟潘

                          problem seemed to be solved with below codes in TD_Poll():

                          I think most ppl use slave FIFO so hat's why GPIF did not provide good enough documents for users to use, nor demo to make everything clear enough so that we need to spend a lot of time to try and test.

                           

                          and please do RESET the cpu before reload FW, or sometimes it goes wrong !!!

                           

                          if ( ( GPIFTRIG & 0x80 ) && !( EP24FIFOFLGS & 0x02 ))  // if there's a packet in the peripheral domain for EP2

                               //&& EP2FIFOBCH==0x04)    // will got stuck while put his

                          {

                              PA5 = 0;          // data direction indication for FPGA, 0 for output to FPGA and 1 for read from FPGA

                              //SUDPTRH = MSB( &EP2FIFOBUF );

                              //SUDPTRL = LSB( &EP2FIFOBUF );

                           

                           

                              GPIFTCB1 = EP2FIFOBCH>>1;                    // stupid GPIF will not automatically do this

                              GPIFTCB0 = EP2FIFOBCL>>1;                    // set length of fifo

                              //GPIFTCB1 = EP2BCH;

                              //GPIFTCB0 = EP2BCL;

                           

                           

                              GPIFTRIG = GPIFTRIGWR | GPIF_EP2;        // launch GPIF FIFO WRITE Transaction from EP2 FIFO

                          }

                           

                           

                          if (PA2 && ( GPIFTRIG & 0x80 ) &&             // PA2 means data ready,if there is data ready for read

                              !( EP68FIFOFLGS & 0x01 ))                // and EP6 not full

                          {

                              PA5 = 1;

                              if (PA6)

                              {

                                  GPIFTCB1 = 0;

                                  GPIFTCB0 = 32;                        // set length of fifo, 32*2bytes

                              }

                              else

                              {

                                  GPIFTCB1 = 0x02;                    // word alignment should /2

                                  GPIFTCB0 = 0x00;                    // set length of fifo

                              }

                              GPIFTRIG = GPIFTRIGRD | GPIF_EP6;        // launch GPIF FIFO WRITE Transaction from EP2 FIFO

                          }

                          • 10. Re: GPIF questions
                            柏晟潘

                            it's time to close this discussion:

                            1. how I could send control data using CTRL_WR wave form, like program trigger CTRL_WR waveform. CTRL data is 64 bytes. I planned to use ep1 to do this.

                            EP1 could use to send ctrl but got no clue to make GPIF switch data between different EPs, got no clue, and could not find any demo code for switch between different EP out.

                             

                            2. as above how to trigger bulk transfer for FIFO_WR/FIFO_RD ?

                            coded alread posted

                             

                            other questions:

                            3. could I use FPGA to make 68013 get into low power mode, or how 68013 could get into low power mode to save power ?

                            my design is send a data block to FPGA and then sleep for a while then wakeup again to transfer.

                            employee replied

                             

                            4. and, any way to interrupt 68013 to trigger CTRL_RD wave form and report to CPU via USB ?

                            could use INT0 to read data from FPGA but data only send via host trigger bulk_transfer or control vendor in request.

                            • 11. Re: GPIF questions
                              srnt

                              Hello,

                               

                              - GPIF cannot be used for control transfers. Also, I had mentioned that EP1 cannot be used with GPIF. Do you mean to say that you are using EP1 for control transfers? If that is the case, you can perform the read/write operation on EP1 using a host application.

                               

                              - As you had mentioned, INT0 interrupt can be used to read data from the FPGA, but to transfer the data from the FX2LP to the USB host, the application running on the host must request for the data. Only upon the reception of an IN request from the USB host, the data is transferred from the FX2LP to the host PC.

                               

                              Best regards,

                              Srinath S

                              • 12. Re: GPIF questions
                                柏晟潘

                                Hi, srnt:

                                 

                                I'm not going to use EP1 but I also could not switch between different eps, like EP2/EP4 GPIF transfer.