Are there any other component running before entering into deep sleep? If yes, suggest to stop all these component before deep sleep.
Has SWD port been configured as GPIO in .cydwr->System->Debug select? If it is configured as SWD, suggest to set it as GPIO.
60-80uA are measured on CY prototype kit or your own board? suggest to isolate PSoC4 supply with other parts on the DUT.
I have slept all other components before entering to deep sleep.
Also, i have configured SWD port as GPIO in .cydwe file.
I got 60-80uA on own board designed using PSoC 4200 BLE(CYBLE-214009).
I did not get your suggestion to isolate power supply.
'isolate'...I mean 'separate'....There may be some other parts on the board 'steal' power.
This app note will be also helpful.<http://www.cypress.com/file/121271/download >. Please make sure that you are changing the mode of the GPIOs to HighZ in deepsleep mode. These suggestions are available in the app note.