Doing this in hardware seems impossible. It's difficult enough to build new 8-bit items in Verilog, and for most encryption you are dealing with 128 bits or more.
Why would you want to do this in hardware?
Here's a C library for AES. This should work in software for PSoC 5. GitHub - kokke/tiny-AES-c: Small portable AES128/192/256 in C
thank you for the link, I'll try that. Reason for hardware implementation was that I don't know how much time a PSoC 5LP needs to do AES. With the code from your link I can do some performance measurements.