Well, here's my two cents (but really a cypress employee would know better I think):
You need to keep the raw voltage level on the GPIO pins below VDD +0.5, as well as keeping the injection current below 0.5 mA either way.
This means that if your voltage goes above VDD +0.5 or the I_GPIO_INJECTION_ goes above 0.5 mA, then it will most likely cause damage.
You might be able to get a voltage above VDD+0.5v, but I wouldn't bet on it. The voltages on small micros generally need to stay between VDD + slight overvoltage and VSS - small undervoltage. So you can't put a large voltage on the GPIO pin and expect it to work well (it may work, but it may break the chip too...)
Tl;Dr; Yes, that is true.
Naively thinking, yes. But if you look at the I/O Cell Structure (Figure 7-2 in the PsoC4 BLE TRM), you can clearly see that the GPIOs are protected by clamping diodes. This means they should be overvoltage tolerant as long as you do not overstep the allowable power dissipation in the protection diodes, which is where the injection current limit could/should come from.
Also on other MCUs it is allowable to have higher input voltages as long as the current is limited. For a manufacturer example, see AN182 by Atmel. I note that the human-safety of that method in the application note is highly questionable, but nevertheless it shows that at least technically it works, and is made possible by the clamping diodes, which the PSoC4 also has.This is why I think the Cypress module datasheet I quoted earlier might be wrong. (EDIT: I do not want to connect my PSoC to mains, my use-case is completely different from the aforementioned AN.)
Would be nice to have a confirmation from Cypress for either of the two possible answers, and should it turn out that I am right, it would be useful for others to have the datasheet corrected.
Ah, you're right about the clamping diodes. That's what I get for not looking at the I/O cell schematic on the TRM.
Hahahahaha; That application note for Atmel is hilarious. Even though it would work, plugging the main into the board is liable for all sorts of potential problems :3
Generically, you shouldn't be using the GPIO protection circuitry as design components, but what you need to do, you need to do >.>
The answer-er mentions all of the points you have brought up plus some more illustration of the point.
It would make sense to have the over-voltage protection on the pins, thus I would agree with your assessment that the clamping diodes will allow higher voltage, but have a maximum current they can sink. This would then line up with the injection current limitation, and would make the datasheet still correct, but just not very clear on the specifications.