PSoC 6 antenna design

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user_1669321
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Hi,

We are looking to integrate a PSoC 6 in our next design, and as the device doesn't have an antenna, I'm looking at AN91445 - Antenna design and RF layout guidelines.

Specifically, I think we are going to use the MIFA antenna shown in Figure 10 of the app note.

I have a question about the VIA circled in red in the figure below. Is this via connected to the ground plane below, or is it just a drill hole?

pastedImage_2.png

Thank you,

Fred

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Hi Fred,

It is OK to add additional via as long as it does not affect the strength of the PCB.

The width of the trace connecting the Antenna to the ANT pin of PSoC should be determined by the PCB stack-up (whatever gives 50 ohms characteristic impedance for the trace). In the example depicted in the Application note, it is wide because the PCB is a two layer 60 mil PCB.

The 273 mil grounded trace is a short circuited stub to compensate for the parasitic capacitance between the Antenna and the ground (since the Antenna is bent and runs parallel to the ground).

Thanks,

Guha

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ShipingW_81
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yes, it should be connected to the ground plane below.

Thank you!

I'm not well practiced with high speed design. Does this 273 mil grounded trace act as a decoupling capacitor to the signal?

Also, the pattern of ground vias in the ground plane was not really clear in the App Note. Here's what I did in Eagle:

pastedImage_0.png

Should I put vias at every 30 mils (horizontally and vertically) or just at the borders of the planes, as it looks like in the App Note?

Another question: The width of the signal trace goes from 20 mils on the antenna to 65 mils. Is this necessary, as I will be connecting the signal to the ANT pin of the PSoC 6. On the PSoC 6 devkit, it looks like the traces is kept at 20 mils all the way to the PSoC.

Yet another question: Should I leave the copper of the antenna uncovered or it doesn't matter if it's covered in solder mask?

Thank you,

Fred

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Hi Fred,

It is OK to add additional via as long as it does not affect the strength of the PCB.

The width of the trace connecting the Antenna to the ANT pin of PSoC should be determined by the PCB stack-up (whatever gives 50 ohms characteristic impedance for the trace). In the example depicted in the Application note, it is wide because the PCB is a two layer 60 mil PCB.

The 273 mil grounded trace is a short circuited stub to compensate for the parasitic capacitance between the Antenna and the ground (since the Antenna is bent and runs parallel to the ground).

Thanks,

Guha

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Hi Guha,

Thank you, that is really helpful.

Indeed, I saw in the app note that the width of the trace (W) goes down when the thickness of the PCB goes down as well.

I measured the thickness of the Pioneer Kit for PSoC 6 and it is also 60 mils, but it's an 8 layer PCB, and there's a ground plane right below the top level (where the antenna is). Does the thickness that defines W is based on the space between the 2 immediate layers (in the Pioneer kit case, TOP + GND1)?

We will have a 6 layer PCB with ~35 mils thickness, and a ground plane directly below the top level (where the antenna is). Do you have a resource to recommend that would help me figure out the width that I need?

Thank you,

Fred

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I just read in the App Note that if the transmission line is short enough (which it will be), the trace width criterion is not as strict, so I'll go with that.

Nevertheless, if you have a resource about trace impedance to recommend, I'd very much like to read it.

Thank you,

Fred

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Anonymous
Not applicable

The type of information you seek is given by the search term "stripline design techniques".

The centre-centre distance between vias connecting two ground planes does not have to be closer than 1/10 wavelength on the media in question; you are going to have a PC fab house cursing at you for broken drill bits on their poor robot, or lots of extra charges to cover it.

The proper trace width for 50 Ohms depends on the thickness of the dielectric between the two copper planes, as does the wavelength, and it has to be well specified.  One thing that does not get highlighted in design very often is the loss in the dielectric at the frequency of use. Some loss helps in matching, but it takes away from how much signal is actually being transmitted by the stripline antenna.

In critical designs a Teflon dielectric must be used just for the active RF layer, in order  to achieve minimum loss, and therefore achieve maximum transmit and receive range for the same transmit power use.

Ken

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Thank you Ken, that is really informative (though leaves me with more questions, but that's the fun of it).

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Anonymous
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You're welcome.  There's a lot of  individual specialities to this trade, and it's hard to keep focus on all of them.

Antennas and waveguides and feedlines have been a specialty of mine for ages, because I love to build them, but much attention has to be paid to matching and loss at the higher frequencies, and the 2.4 GHz spectrum is right in the middle of that, with 5 GHz coming up soon. Inexpensive grades of FR4 board have hidden a lot of design errors, because of the loss "helping" matching.  But when you need that extra 100 ft in Wifi or BLE, when working in a quiet RF background zone, then you must pay attention.

With short range, with industrial noise all about, what difference does it make? , so almost anything, including a paper clip, will work.

Ken Nelson

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