Just a suggestion:
Can we try connecting the SCLK line of SPI to the PWM. Then the LE can be generated by PWM component output.
Setting the Period as 24 and compare as 2 [for data latch]
And by simply changing the compare you can select different LE signal 'digital keys' [Table 7. Digital keys summary - http://www.st.com/content/ccc/resource/technical/document/datasheet/38/87/8b/7a/c1/cf/4d/36/DM00084263.pdf/files/DM00084… ]
One or two weeks ago I found a solution that works, somewhat similar to yours. Instead of a PWM I used a counter component, so the SCLK line is connected to the COUNT of the counter (the SPIM and Counter share the same clock input). I added a logical 'not' on the COUNT input so the counter would update the LE line before the next rising edge of the SCLK.
I adjust the counter compare value as needed for different LE digital keys.