2 Replies Latest reply on Feb 11, 2018 1:13 PM by FrCa_2686456

    PSoC 6 Memory Management




      How do the processors (M0+ and M4) deal with memory management in PSoC 6?

      I read that both the M0+ and M4 share access to peripherals and memory. In order to avoid collisions or errors when executing instructions, how does the memory management work?


      Please provide links to Reference Manuals or any related info.


      Thank you in advance for any help you can provide.