2 Replies Latest reply on Feb 15, 2018 10:50 AM by JacobT_81

    CYW20706 and UART_Tx

      Hi,

       

      We have used CYW20706UA1KFFB1G and CYW20706UA2KFFB4G  variants of 20706 part in our design and we have observed the following behaviour:

       

      When we used “CYW20706UA1KFFB1G” in our design we observed -

      • On power-up, when chip is in reset (reset is not released yet, A6-pin is ‘low’) - > BT_UART_TXD (F4-pin) is at logic ‘high’ by default

       

      Now, we have changed to “CYW20706UA2KFFB4G” chip version where we have observed -

      • On power-up, when chip is in reset (reset is not released yet, A6-pin is ‘low’) - > BT_UART_TXD (F4-pin) is at logic ‘low’ by default
      • After release reset, BT_UART_TXD (F4-pin) is going to logic ‘high

       

      We request you to help us understand  the difference of “BT_UART_TXD” pin default status for above two different versions of chips.

       

      Thank you,

      Pravinkumar