10 Replies Latest reply on Jan 17, 2018 8:06 PM by BoonT_56

    CYW20706 and XO_IN load to reference clock



      We observed XO_IN A4 pin load to our reference clock input (supplied from oscillator or function generator).

      1.8Vp-p signal becomes ~1.2Vp-p when connected to XO_IN pin of Cypress chip. See attached waveforms of reference clock without and with connections.


      We would like to know from Cypress support team what could be reason for loading effect on input reference clock. We tried reference clock from oscillator and function generator, observations are same.



      Thank you,