3 Replies Latest reply on Feb 20, 2018 1:12 AM by srnt

    Cy68013 hot swap, result in  Ep6 return zero-length packets

    gxlyy_2232206

      Hi,

          We are working on data acquisition module,compose with PC,Cy68013 and FPGA.

          The Endpoint are cofigured in firmware as follows:

       

      1)EP2:OUT,512*2,used for commnand port, data rate is below 1kB/s,nonperiodic

      2)EP4:IN,512*2,used for state port, data rate is below 1kB/s, nonperiodic

      3)EP6:IN,512*4,used for data transfer port. data rare about 10MB/s or 10kB/s;periodic

      4)bulk,slave mode, AUTOIN = 0 。

       

      During data acquisition, unplugged from USB and then plugged into USB, Ep2\Ep4 resume to work OK. If FPGA writes data to Ep6 with data rate about 15MB/s, EP6 resume to work OK too.

      But if FPGA writes data to Ep6 with data rate abot 10kB/s, EP6 can't resume to work ok. The function Xferdata() or finishdataxfer() always return TRUE with zero-length packets, can't receive any data from 68013.

       

      If any of the experts have suggestions/ideas on how to go about solving this, it would be greatly appreciated.

      Best Regards,

      Liyy

        • 1. Re: Cy68013 hot swap, result in  Ep6 return zero-length packets
          srnt

          Hello Liyy,

           

          When the CY7C68013 is unplugged from the USB host and re-connected, the firmware is loaded fresh into the RAM and the device undergoes enumeration.

           

          Do you mean to say that this issue occurs only when the device is unplugged and connected back  or whenever the data rates are about the order of 10kBps? When the device remains connected to the USB host and the data rate is changed to 10kBps, do you still find the issue?

           

          Also, please let me know the configuration of the IFCLK.

           

          Best regards,
          Srinath S

          • 2. Re: Cy68013 hot swap, result in  Ep6 return zero-length packets
            gxlyy_2232206

            Hi Srinath,

            Thanks for your response.

             

            In the data acquisition module, When the CY7C68013 is unplugged from the USB host, Cy7C68013 do not poweroff.

            The issue is almost occurs only when the device is unplugged and connected back, while the EP6 data rate about 10KB/s. if the EP6 data rate about 15MB/s, no this issue,  data transfer resume to normally.

             

            The module status information and sampled data share EP6 at the same time. The status information is period transmitted to host, data rate is about 10kB/s. The sampled data rate is about 15MB/s. When data is stopped sample, EP6 data rate is about 10kBps.

             

            Cy7C68013 works on slave mode. FPGA provide IFCLK signal.

             

            Last week, we found when the  issue occurs, reset EP6, the device resume to normal. Would you like to tell me why ?

             

            Best regards.

            Liyy

            • 3. Re: Cy68013 hot swap, result in  Ep6 return zero-length packets
              srnt

              Hello Liyy,

               

              - Please let me know if the CY7C68013 chip is used in the self-powered mode.

              - Are you using a custom host application to read the data into the host or have you tested with the Cypress USB Control Center or C# Streamer application?

              - Also, note that when reading data into the USB host, the external clock from the FPGA to the FX2LP must not be disconnected. Please let me know if the FPGA is powered down when the FX2LP is unplugged or is there any interruption in the IFCLK during the data transfer.

               

              Best regards,

              Srinath S