0 Replies Latest reply on Jan 7, 2018 7:13 AM by gxlyy_2232206

    Cy68013 hot swap, result in  Ep6 return zero-length packets



          We are working on data acquisition module,compose with PC,Cy68013 and FPGA.

          The Endpoint are cofigured in firmware as follows:


      1)EP2:OUT,512*2,used for commnand port, data rate is below 1kB/s,nonperiodic

      2)EP4:IN,512*2,used for state port, data rate is below 1kB/s, nonperiodic

      3)EP6:IN,512*4,used for data transfer port. data rare about 10MB/s or 10kB/s;periodic

      4)bulk,slave mode, AUTOIN = 0 。


      During data acquisition, unplugged from USB and then plugged into USB, Ep2\Ep4 resume to work OK. If FPGA writes data to Ep6 with data rate about 15MB/s, EP6 resume to work OK too.

      But if FPGA writes data to Ep6 with data rate abot 10kB/s, EP6 can't resume to work ok. The function Xferdata() or finishdataxfer() always return TRUE with zero-length packets, can't receive any data from 68013.


      If any of the experts have suggestions/ideas on how to go about solving this, it would be greatly appreciated.

      Best Regards,