14 Replies Latest reply on Jun 6, 2018 6:59 AM by xiaomeng16_3361066

    CYW43907 SPI Slave interface

    harrison_2758731

      Hello,

       

      I want to know about SPI slave interface of CYW43907.

      There are two SPI but those are master interface which is written in 1.1.1 Features of CYW43907 data sheet.

      (Those SPI pins are described as SPI0_*, SPI1_* in the data sheet.)

       

      There is a gSPI(SDIO3.0) in the figure 2 (block diagram).

      Is this SPI slave interface ? There is no detail explanation in the data sheet.

      If this is correct, the pin assignments are as follows ? ;

        SD CLK -> SPI Clock input for CYW43907

        SD CMD -> SPI MOSI input for CYW43907

        SD DATA0 -> SPI MISO output from CYW43907

        SD DATA1 -> SPI IRQ output from CYW43907

      How about chip select ? SD DATA 2?

       

      Please somebody clarify them for my design.

       

      Thank you in advance.

       

      Hiroto