1 Reply Latest reply on Jan 4, 2018 1:13 PM by boris.yost_3017026

    CY14B116N nvSRAM command sequences

    boris.yost_3017026

      Hello, the part in question has Table 1 Mode Selection in the data sheet, which lists the series of reads which must be done in order to perform commands (AutoStore Disable, etc).  The addresses listed in the 5th column are 16 bit addresses.  If you expand out the addresses which must be read to activate a command into binary, you find that, looking across all of the commands, all of the bits A[15..0] take a value of both 0 and 1.  (Higher order bits A16 and higher are don't care and not listed.) 

       

      However, we also have Note 12:  While there are 21 address lines on the CY14X116L (20 address lines on the CY14X116N and 19 address lines on the CY14X116S), only 13 address lines (A14–A2) are used to control software modes.

       

      Note 12 seems to be in conflict with the addresses listed for the commands; all of them plainly have values listed for A[1..0] and A[15], and take both 0 and 1 to activate each command.  If they are really don't care, why were addresses listed which assert both 0 and 1 to the unused lines?

       

      Thanks,

      Boris