8 Replies Latest reply on Jan 14, 2018 3:40 PM by tn49179_3003661

    Problem using both UART and DMA block

    tn49179_3003661

      Hi,

      I am using CYC8CKIT-048 PSOC Analog Coprocessor Pioneer Kit and am experiencing issues while using both UART and DMA block in the same project.

      I need to use the digital data sent from a PC and received via UART to determine which frequency sine wave should be generated (basically I need to make a FSK modulator).

      I was trying to do that by connecting UART_tx to the switch input of a TCPWM by using one pin configured as digital output for UART and one as digital input for PWM and connecting them (by wire). I was planning to use the PWM as a clock divider (since this PSOC doesn't have a digital mux, or I can't seem to find it?) which counts to different values depending on the value of switch input.

      Then i would connect PWM line output to DMA trigger input, and DMA would transfer data from a sine LUT table to VDAC's internal register and route VDAC to an output pin.

      But when i try to build the project I get an error saying that the placer is unable to find a valid placement for pins and fixed-function blocks.

       

      Is there a way to do this the way I imagined, or am I missing something?

       

      Thanks

       

       

      Here is a copy of placer.txt file:

      Phase 4

      E2809: Unable to find a valid placement for pins and fixed-function blocks. See the Digital Placement's Detailed placement messages section in the report file for details.

      I2722: The following instances could not be placed:

         \PWM_1:cy_m0s8_tcpwm_1\ (0 location(s))

         ClockBlock (1 location(s): F(Clock,0))

         \UART_1:SCB\ (3 location(s): F(SCB,0) F(SCB,1) F(SCB,2))

      Fixed function block and pin placement:

         P1[1]: Pin_2(0)

         F(HALFUAB,0): \VDAC_1:UAB:halfuab\

         F(p4prefcell,0): CyDesignWideVoltageReference

         P4[1]: Pin_3(0)

         F(CLK_GEN,0): ClockGenBlock

         F(OA,2): \VDAC_1:OUTBUFFER:cy_psoc4_abuf\

         P0[4]: Pin_1(0)

         P1[2]: Pin_4(0)

       

      E2055: An error occurred during placement of the design.