1 2 Previous Next 16 Replies Latest reply on Jan 5, 2018 9:07 AM by vipul.bagga_2990166

    Changed Micron(pc28f256p33bfe i suppose) to Spansion S29GL256S10TF102 failed

    vipul.bagga_2990166

      Hi Recently we changed from Micron(pc28f256p33bfe i suppose) to Spansion S29GL256S10TF102 and nothing else is changed.

      And as i'm not much aware of kernel/Driver part so i don't know what could be this.

       

       

      Some details provided below incase you guys can help

       

       

      FAILURE LOGS :

       

       

      NetRefDAC calibration: 0xff,0xff, 0xffff

      md5sum in eeprom (115429abe4d090c834c58f11555026c7) is incorrect

      Unable to verify eeprom, setting model to 'ZFS'

      Reading PCB info again

      NetRefDAC calibration: 0xff,0xff, 0xffff

      md5sum in eeprom (115429abe4d090c834c58f11555026c7) is incorrect

      Unable to verify eeprom, setting model to 'ZFS'

      Last[0] is ffff

      Last[1] is ffff

      Last[2] is ffff

      Last[2] is ffff, datum is 2705

       

       

      [What's this datum here]

       

       

      Some more inforamtion:

       

       

      we're running old ppc board:

      /dev # Uname -a

      /dev # Linux 192.168.1.1 2.4.4 #256 Fri .... ppc unknown

       

       

      Code:

      [where i can see this log]

      static int do_write_oneword(struct map_info *map, struct flchip *chip, unsigned long adr, __u32 datum, int fast)

      {

          unsigned long timeo = jiffies + HZ;

          unsigned int Last[4];

          unsigned long Count = 0;

          struct cfi_private *cfi = map->fldrv_priv;

          DECLARE_WAITQUEUE(wait, current);

      .

      .

      .

      .

      .

      .

      .

      .

          if (Last[(Count - 1) % 4] != datum){

              printk("Last[%ld] is %x, datum is %x\n",(Count - 1) % 4,Last[(Count - 1) % 4],datum);

                  cfi_send_gen_cmd(0xF0, 0, chip->start, map, cfi, cfi->device_type, NULL);

              DISABLE_VPP(map);

              ret = -EIO;

          }

          DISABLE_VPP(map);

          chip->state = FL_READY;

          wake_up(&chip->wq);

          cfi_spin_unlock(chip->mutex);

       

       

          return ret;

      }

       

      Please help incase anyone know anytime bout it

       

      Thanks In Advance .. !!

        • 1. Re: Changed Micron(pc28f256p33bfe i suppose) to Spansion S29GL256S10TF102 failed
          geho

          Hi,

           

          the argument datum of do_write_oneword() (file drivers/mtd/chips/cfi_cmdset_0002.c) is the data value that has to be programmed into flash at address adr.

           

          It seems like the code you mentioned (if clause and printk statement) has been added by some developer. It is not part of the standard Linux kernel source code. Seems like that developer has replaced the original toggling polling by data polling.

           

          Can you send us the complete cfi_cmdset_0002.c of your kernel tree?

           

          Thanks,
          Gernot

          • 2. Re: Changed Micron(pc28f256p33bfe i suppose) to Spansion S29GL256S10TF102 failed
            vipul.bagga_2990166

            Hi ,

            Thanks for quick reply

            I suppose you're right one of developer may have done some changes, but as per history I can see some changes(actually added) in year 2002 and he left. So, there was no change to this file thereafter.

             

            well, we're running old ppc board:

            /dev # Uname -a

            /dev # Linux 192.168.1.1 2.4.4 #256 Fri .... ppc unknown 

            i think 2.4.4 is kernel verision & please let me know for more info required

             

             

            and also cfi_cmdset_0002.c file is below:

             

            /*

            * Common Flash Interface support:

            *   AMD & Fujitsu Standard Vendor Command Set (ID 0x0002)

            *

            * Copyright (C) 2000 Crossnet Co. <info@crossnet.co.jp>

            *

            * 2_by_8 routines added by Simon Munton

            *

            * This code is GPL

            *

            * $Id: cfi_cmdset_0002.c,v 1.2 2002/01/30 18:09:22 ajz Exp $

            *

            */

             

             

            #include <linux/module.h>

            #include <linux/types.h>

            #include <linux/kernel.h>

            #include <linux/sched.h>

            #include <asm/io.h>

            #include <asm/byteorder.h>

             

             

            #include <linux/errno.h>

            #include <linux/slab.h>

            #include <linux/delay.h>

            #include <linux/interrupt.h>

            #include <linux/mtd/map.h>

            #include <linux/mtd/cfi.h>

             

             

            #define AMD_BOOTLOC_BUG

             

             

            static int cfi_amdstd_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);

            static int cfi_amdstd_write(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);

            static int cfi_amdstd_erase_onesize(struct mtd_info *, struct erase_info *);

            static int cfi_amdstd_erase_varsize(struct mtd_info *, struct erase_info *);

            static void cfi_amdstd_sync (struct mtd_info *);

            static int cfi_amdstd_suspend (struct mtd_info *);

            static void cfi_amdstd_resume (struct mtd_info *);

             

             

            static void cfi_amdstd_destroy(struct mtd_info *);

             

             

            struct mtd_info *cfi_cmdset_0002(struct map_info *, int);

            static struct mtd_info *cfi_amdstd_setup (struct map_info *);

             

             

             

             

            static struct mtd_chip_driver cfi_amdstd_chipdrv = {

            probe: NULL, /* Not usable directly */

            destroy: cfi_amdstd_destroy,

            name: "cfi_cmdset_0002",

            module: THIS_MODULE

            };

             

             

            struct mtd_info *cfi_cmdset_0002(struct map_info *map, int primary)

            {

            struct cfi_private *cfi = map->fldrv_priv;

            unsigned char bootloc;

            int ofs_factor = cfi->interleave * cfi->device_type;

            int i;

            __u8 major, minor;

            __u32 base = cfi->chips[0].start;

             

             

            if (cfi->cfi_mode==1){

            __u16 adr = primary?cfi->cfiq->P_ADR:cfi->cfiq->A_ADR;

             

             

            cfi_send_gen_cmd(0x98, 0x55, base, map, cfi, cfi->device_type, NULL);

             

            major = cfi_read_query(map, base + (adr+3)*ofs_factor);

            minor = cfi_read_query(map, base + (adr+4)*ofs_factor);

             

            printk(" Amd/Fujitsu Extended Query Table v%c.%c at 0x%4.4X\n",

                   major, minor, adr);

            cfi_send_gen_cmd(0xf0, 0x55, base, map, cfi, cfi->device_type, NULL);

             

            cfi_send_gen_cmd(0xaa, 0x555, base, map, cfi, cfi->device_type, NULL);

            cfi_send_gen_cmd(0x55, 0x2aa, base, map, cfi, cfi->device_type, NULL);

            cfi_send_gen_cmd(0x90, 0x555, base, map, cfi, cfi->device_type, NULL);

            cfi->mfr = cfi_read_query(map, base);

            cfi->id = cfi_read_query(map, base + ofs_factor);

             

             

            /* Wheee. Bring me the head of someone at AMD. */

            #ifdef AMD_BOOTLOC_BUG

            if (((major << 8) | minor) < 0x3131) {

            /* CFI version 1.0 => don't trust bootloc */

            if (cfi->id & 0x80) {

            printk(KERN_WARNING "%s: JEDEC Device ID is 0x%02X. Assuming broken CFI table.\n", map->name, cfi->id);

            bootloc = 3; /* top boot */

            } else {

            bootloc = 2; /* bottom boot */

            }

            } else

            #endif

            {

            cfi_send_gen_cmd(0x98, 0x55, base, map, cfi, cfi->device_type, NULL);

            bootloc = cfi_read_query(map, base + (adr+15)*ofs_factor);

            }

            if (bootloc == 3 && cfi->cfiq->NumEraseRegions > 1) {

            printk(KERN_WARNING "%s: Swapping erase regions for broken CFI table.\n", map->name);

             

            for (i=0; i<cfi->cfiq->NumEraseRegions / 2; i++) {

            int j = (cfi->cfiq->NumEraseRegions-1)-i;

            __u32 swap;

             

            swap = cfi->cfiq->EraseRegionInfo[i];

            cfi->cfiq->EraseRegionInfo[i] = cfi->cfiq->EraseRegionInfo[j];

            cfi->cfiq->EraseRegionInfo[j] = swap;

            }

            }

            switch (cfi->device_type) {

            case CFI_DEVICETYPE_X8:

            cfi->addr_unlock1 = 0x555;

            cfi->addr_unlock2 = 0x2aa;

            break;

            case CFI_DEVICETYPE_X16:

            cfi->addr_unlock1 = 0xaaa;

            if (map->buswidth == cfi->interleave) {

            /* X16 chip(s) in X8 mode */

            cfi->addr_unlock2 = 0x555;

            } else {

            cfi->addr_unlock2 = 0x554;

            }

            break;

            case CFI_DEVICETYPE_X32:

            cfi->addr_unlock1 = 0x1555;

            cfi->addr_unlock2 = 0xaaa;

            break;

            default:

            printk(KERN_NOTICE "Eep. Unknown cfi_cmdset_0002 device type %d\n", cfi->device_type);

            return NULL;

            }

            } /* CFI mode */

             

             

            for (i=0; i< cfi->numchips; i++) {

            cfi->chips[i].word_write_time = 1<<cfi->cfiq->WordWriteTimeoutTyp;

            cfi->chips[i].buffer_write_time = 1<<cfi->cfiq->BufWriteTimeoutTyp;

            cfi->chips[i].erase_time = 1<<cfi->cfiq->BlockEraseTimeoutTyp;

            }

             

            map->fldrv = &cfi_amdstd_chipdrv;

            MOD_INC_USE_COUNT;

             

             

            cfi_send_gen_cmd(0xf0, 0x55, base, map, cfi, cfi->device_type, NULL);

            return cfi_amdstd_setup(map);

            }

             

             

            static struct mtd_info *cfi_amdstd_setup(struct map_info *map)

            {

            struct cfi_private *cfi = map->fldrv_priv;

            struct mtd_info *mtd;

            unsigned long devsize = (1<<cfi->cfiq->DevSize) * cfi->interleave;

             

             

            mtd = kmalloc(sizeof(*mtd), GFP_KERNEL);

            printk("number of %s chips: %d\n", (cfi->cfi_mode)?"JEDEC":"CFI",cfi->numchips);

             

             

            if (!mtd) {

              printk("Failed to allocate memory for MTD device\n");

              kfree(cfi->cmdset_priv);

              return NULL;

            }

             

             

            memset(mtd, 0, sizeof(*mtd));

            mtd->priv = map;

            mtd->type = MTD_NORFLASH;

            /* Also select the correct geometry setup too */

            mtd->size = devsize * cfi->numchips;

             

            if (cfi->cfiq->NumEraseRegions == 1) {

            /* No need to muck about with multiple erase sizes */

            mtd->erasesize = ((cfi->cfiq->EraseRegionInfo[0] >> 8) & ~0xff) * cfi->interleave;

            } else {

            unsigned long offset = 0;

            int i,j;

             

             

            mtd->numeraseregions = cfi->cfiq->NumEraseRegions * cfi->numchips;

            mtd->eraseregions = kmalloc(sizeof(struct mtd_erase_region_info) * mtd->numeraseregions, GFP_KERNEL);

            if (!mtd->eraseregions) {

            printk("Failed to allocate memory for MTD erase region info\n");

            kfree(cfi->cmdset_priv);

            return NULL;

            }

             

            for (i=0; i<cfi->cfiq->NumEraseRegions; i++) {

            unsigned long ernum, ersize;

            ersize = ((cfi->cfiq->EraseRegionInfo[i] >> 8) & ~0xff) * cfi->interleave;

            ernum = (cfi->cfiq->EraseRegionInfo[i] & 0xffff) + 1;

             

            if (mtd->erasesize < ersize) {

            mtd->erasesize = ersize;

            }

            for (j=0; j<cfi->numchips; j++) {

            mtd->eraseregions[(j*cfi->cfiq->NumEraseRegions)+i].offset = (j*devsize)+offset;

            mtd->eraseregions[(j*cfi->cfiq->NumEraseRegions)+i].erasesize = ersize;

            mtd->eraseregions[(j*cfi->cfiq->NumEraseRegions)+i].numblocks = ernum;

            }

            offset += (ersize * ernum);

            }

            if (offset != devsize) {

            /* Argh */

            printk("Sum of regions (%lx) != total size of set of interleaved chips (%lx)\n", offset, devsize);

            kfree(mtd->eraseregions);

            kfree(cfi->cmdset_priv);

            return NULL;

            }

            // debug

            for (i=0; i<mtd->numeraseregions;i++){

            printk("%d: offset=0x%x,size=0x%x,blocks=%d\n",

                   i,mtd->eraseregions[i].offset,

                   mtd->eraseregions[i].erasesize,

                   mtd->eraseregions[i].numblocks);

            }

            }

             

             

            switch (CFIDEV_BUSWIDTH)

            {

            case 1:

            case 2:

            case 4:

            #if 1

            if (mtd->numeraseregions > 1)

            mtd->erase = cfi_amdstd_erase_varsize;

            else

            #endif

            mtd->erase = cfi_amdstd_erase_onesize;

            mtd->read = cfi_amdstd_read;

            mtd->write = cfi_amdstd_write;

            break;

             

             

            default:

                    printk("Unsupported buswidth\n");

            kfree(mtd);

            kfree(cfi->cmdset_priv);

            return NULL;

            break;

            }

            mtd->sync = cfi_amdstd_sync;

            mtd->suspend = cfi_amdstd_suspend;

            mtd->resume = cfi_amdstd_resume;

            mtd->flags = MTD_CAP_NORFLASH;

            map->fldrv = &cfi_amdstd_chipdrv;

            mtd->name = map->name;

            MOD_INC_USE_COUNT;

            return mtd;

            }

             

             

            static inline int do_read_onechip(struct map_info *map, struct flchip *chip, loff_t adr, size_t len, u_char *buf)

            {

            DECLARE_WAITQUEUE(wait, current);

            unsigned long timeo = jiffies + HZ;

             

             

            retry:

            cfi_spin_lock(chip->mutex);

             

             

            if (chip->state != FL_READY){

            #if 0  // AJZ 2002-01-29: commented out harmless debug which was clogging up console

                    printk("Waiting for chip to read, status = %d\n", chip->state);

            #endif

            set_current_state(TASK_UNINTERRUPTIBLE);

            add_wait_queue(&chip->wq, &wait);

                          

            cfi_spin_unlock(chip->mutex);

             

             

            schedule();

            remove_wait_queue(&chip->wq, &wait);

            #if 0

            if(signal_pending(current))

            return -EINTR;

            #endif

            timeo = jiffies + HZ;

             

             

            goto retry;

            }

             

             

            adr += chip->start;

             

             

            chip->state = FL_READY;

             

             

            map->copy_from(map, buf, adr, len);

             

             

            wake_up(&chip->wq);

            cfi_spin_unlock(chip->mutex);

             

             

            return 0;

            }

             

             

            static int cfi_amdstd_read (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf)

            {

            struct map_info *map = mtd->priv;

            struct cfi_private *cfi = map->fldrv_priv;

            unsigned long ofs;

            int chipnum;

            int ret = 0;

             

             

            /* ofs: offset within the first chip that the first read should start */

             

             

            chipnum = (from >> cfi->chipshift);

            ofs = from - (chipnum <<  cfi->chipshift);

             

             

             

             

            *retlen = 0;

             

             

            while (len) {

            unsigned long thislen;

             

             

            if (chipnum >= cfi->numchips)

            break;

             

             

            if ((len + ofs -1) >> cfi->chipshift)

            thislen = (1<<cfi->chipshift) - ofs;

            else

            thislen = len;

             

             

            ret = do_read_onechip(map, &cfi->chips[chipnum], ofs, thislen, buf);

            if (ret)

            break;

             

             

            *retlen += thislen;

            len -= thislen;

            buf += thislen;

             

             

            ofs = 0;

            chipnum++;

            }

            return ret;

            }

             

             

            static int do_write_oneword(struct map_info *map, struct flchip *chip, unsigned long adr, __u32 datum, int fast)

            {

            unsigned long timeo = jiffies + HZ;

            unsigned int Last[4];

            unsigned long Count = 0;

            struct cfi_private *cfi = map->fldrv_priv;

            DECLARE_WAITQUEUE(wait, current);

            int ret = 0;

             

             

            retry:

            cfi_spin_lock(chip->mutex);

             

             

            if (chip->state != FL_READY){

                    printk("Waiting for chip to write, status = %d\n", chip->state);

            set_current_state(TASK_UNINTERRUPTIBLE);

            add_wait_queue(&chip->wq, &wait);

                          

            cfi_spin_unlock(chip->mutex);

             

             

            schedule();

            remove_wait_queue(&chip->wq, &wait);

            printk("Wake up to write:\n");

            #if 0

            if(signal_pending(current))

            return -EINTR;

            #endif

            timeo = jiffies + HZ;

             

             

            goto retry;

            }

             

             

            chip->state = FL_WRITING;

             

             

            adr += chip->start;

            ENABLE_VPP(map);

            if (fast) { /* Unlock bypass */

            cfi_send_gen_cmd(0xA0, 0, chip->start, map, cfi, cfi->device_type, NULL);

            }

            else {

                    cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, CFI_DEVICETYPE_X8, NULL);

                    cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, CFI_DEVICETYPE_X8, NULL);

                    cfi_send_gen_cmd(0xA0, cfi->addr_unlock1, chip->start, map, cfi, CFI_DEVICETYPE_X8, NULL);

            }

             

             

            cfi_write(map, datum, adr);

             

             

            cfi_spin_unlock(chip->mutex);

            cfi_udelay(chip->word_write_time);

            cfi_spin_lock(chip->mutex);

             

             

            Last[0] = cfi_read(map, adr);

            // printk("Last[0] is %x\n", Last[0]);

            Last[1] = cfi_read(map, adr);

            // printk("Last[1] is %x\n", Last[1]);

            Last[2] = cfi_read(map, adr);

            // printk("Last[2] is %x\n", Last[2]);

             

             

            for (Count = 3; Last[(Count - 1) % 4] != Last[(Count - 2) % 4] && Count < 10000; Count++){

            cfi_spin_unlock(chip->mutex);

            cfi_udelay(10);

            cfi_spin_lock(chip->mutex);

             

                    Last[Count % 4] = cfi_read(map, adr);

            // printk("Last[%d%%4] is %x\n", Count, Last[Count%4]);

            }

             

            if (Last[(Count - 1) % 4] != datum){

            printk("Last[%ld] is %x, datum is %x\n",(Count - 1) % 4,Last[(Count - 1) % 4],datum);

                    cfi_send_gen_cmd(0xF0, 0, chip->start, map, cfi, cfi->device_type, NULL);

            DISABLE_VPP(map);

            ret = -EIO;

            }     

            DISABLE_VPP(map);

            chip->state = FL_READY;

            wake_up(&chip->wq);

            cfi_spin_unlock(chip->mutex);

             

            return ret;

            }

             

             

            static int cfi_amdstd_write (struct mtd_info *mtd, loff_t to , size_t len, size_t *retlen, const u_char *buf)

            {

            struct map_info *map = mtd->priv;

            struct cfi_private *cfi = map->fldrv_priv;

            int ret = 0;

            int chipnum;

            unsigned long ofs, chipstart;

             

             

            *retlen = 0;

            if (!len)

            return 0;

             

             

            chipnum = to >> cfi->chipshift;

            ofs = to  - (chipnum << cfi->chipshift);

            chipstart = cfi->chips[chipnum].start;

             

             

            /* If it's not bus-aligned, do the first byte write */

            if (ofs & (CFIDEV_BUSWIDTH-1)) {

            unsigned long bus_ofs = ofs & ~(CFIDEV_BUSWIDTH-1);

            int i = ofs - bus_ofs;

            int n = 0;

            u_char tmp_buf[4];

            __u32 datum;

             

             

            map->copy_from(map, tmp_buf, bus_ofs + cfi->chips[chipnum].start, CFIDEV_BUSWIDTH);

            while (len && i < CFIDEV_BUSWIDTH)

            tmp_buf[i++] = buf[n++], len--;

             

             

            if (cfi_buswidth_is_2()) {

            datum = *(__u16*)tmp_buf;

            } else if (cfi_buswidth_is_4()) {

            datum = *(__u32*)tmp_buf;

            } else {

            return -EINVAL;  /* should never happen, but be safe */

            }

             

             

            ret = do_write_oneword(map, &cfi->chips[chipnum],

            bus_ofs, datum, 0);

            if (ret)

            return ret;

             

            ofs += n;

            buf += n;

            (*retlen) += n;

             

             

            if (ofs >> cfi->chipshift) {

            chipnum ++;

            ofs = 0;

            if (chipnum == cfi->numchips)

            return 0;

            }

            }

             

            /* Go into unlock bypass mode */

            cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chipstart, map, cfi, CFI_DEVICETYPE_X8, NULL);

            cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chipstart, map, cfi, CFI_DEVICETYPE_X8, NULL);

            cfi_send_gen_cmd(0x20, cfi->addr_unlock1, chipstart, map, cfi, CFI_DEVICETYPE_X8, NULL);

             

             

            /* We are now aligned, write as much as possible */

            while(len >= CFIDEV_BUSWIDTH) {

            __u32 datum;

             

             

            if (cfi_buswidth_is_1()) {

            datum = *(__u8*)buf;

            } else if (cfi_buswidth_is_2()) {

            datum = *(__u16*)buf;

            } else if (cfi_buswidth_is_4()) {

            datum = *(__u32*)buf;

            } else {

            return -EINVAL;

            }

            ret = do_write_oneword(map, &cfi->chips[chipnum],

                   ofs, datum, cfi->fast_prog);

            if (ret) {

            if (cfi->fast_prog){

            /* Get out of unlock bypass mode */

            cfi_send_gen_cmd(0x90, 0, chipstart, map, cfi, cfi->device_type, NULL);

            cfi_send_gen_cmd(0x00, 0, chipstart, map, cfi, cfi->device_type, NULL);

            }

            return ret;

            }

             

             

            ofs += CFIDEV_BUSWIDTH;

            buf += CFIDEV_BUSWIDTH;

            (*retlen) += CFIDEV_BUSWIDTH;

            len -= CFIDEV_BUSWIDTH;

             

             

            if (ofs >> cfi->chipshift) {

            if (cfi->fast_prog){

            /* Get out of unlock bypass mode */

            cfi_send_gen_cmd(0x90, 0, chipstart, map, cfi, cfi->device_type, NULL);

            cfi_send_gen_cmd(0x00, 0, chipstart, map, cfi, cfi->device_type, NULL);

            }

             

             

            chipnum ++;

            ofs = 0;

            if (chipnum == cfi->numchips)

            return 0;

            chipstart = cfi->chips[chipnum].start;

            if (cfi->fast_prog){

            /* Go into unlock bypass mode for next set of chips */

            cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chipstart, map, cfi, CFI_DEVICETYPE_X8, NULL);

            cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chipstart, map, cfi, CFI_DEVICETYPE_X8, NULL);

            cfi_send_gen_cmd(0x20, cfi->addr_unlock1, chipstart, map, cfi, CFI_DEVICETYPE_X8, NULL);

            }

            }

            }

             

             

            if (cfi->fast_prog){

            /* Get out of unlock bypass mode */

            cfi_send_gen_cmd(0x90, 0, chipstart, map, cfi, cfi->device_type, NULL);

            cfi_send_gen_cmd(0x00, 0, chipstart, map, cfi, cfi->device_type, NULL);

            }

             

             

            if (len & (CFIDEV_BUSWIDTH-1)) {

            int i = 0, n = 0;

            u_char tmp_buf[4];

            __u32 datum;

             

             

            map->copy_from(map, tmp_buf, ofs + cfi->chips[chipnum].start, CFIDEV_BUSWIDTH);

            while (len--)

            tmp_buf[i++] = buf[n++];

             

             

            if (cfi_buswidth_is_2()) {

            datum = *(__u16*)tmp_buf;

            } else if (cfi_buswidth_is_4()) {

            datum = *(__u32*)tmp_buf;

            } else {

            return -EINVAL;  /* should never happen, but be safe */

            }

             

             

            ret = do_write_oneword(map, &cfi->chips[chipnum],

            ofs, datum, 0);

            if (ret)

            return ret;

             

            (*retlen) += n;

            }

             

             

            return 0;

            }

             

             

            static inline int do_erase_oneblock(struct map_info *map, struct flchip *chip, unsigned long adr)

            {

            unsigned int status;

            unsigned long timeo = jiffies + HZ;

            struct cfi_private *cfi = map->fldrv_priv;

            unsigned int rdy_mask;

            DECLARE_WAITQUEUE(wait, current);

             

             

            retry:

            cfi_spin_lock(chip->mutex);

             

             

            if (chip->state != FL_READY){

            set_current_state(TASK_UNINTERRUPTIBLE);

            add_wait_queue(&chip->wq, &wait);

                          

            cfi_spin_unlock(chip->mutex);

             

             

            schedule();

            remove_wait_queue(&chip->wq, &wait);

            #if 0

            if(signal_pending(current))

            return -EINTR;

            #endif

            timeo = jiffies + HZ;

             

             

            goto retry;

            }

             

             

            chip->state = FL_ERASING;

             

             

            adr += chip->start;

            ENABLE_VPP(map);

            cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, CFI_DEVICETYPE_X8, NULL);

            cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, CFI_DEVICETYPE_X8, NULL);

            cfi_send_gen_cmd(0x80, cfi->addr_unlock1, chip->start, map, cfi, CFI_DEVICETYPE_X8, NULL);

            cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chip->start, map, cfi, CFI_DEVICETYPE_X8, NULL);

            cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chip->start, map, cfi, CFI_DEVICETYPE_X8, NULL);

            cfi_write(map, CMD(0x30), adr);

             

            timeo = jiffies + (HZ*20);

             

             

            cfi_spin_unlock(chip->mutex);

            schedule_timeout(HZ);

            cfi_spin_lock(chip->mutex);

             

            rdy_mask = CMD(0x80);

             

             

            /* FIXME. Use a timer to check this, and return immediately. */

            /* Once the state machine's known to be working I'll do that */

             

             

            while ( ( (status = cfi_read(map,adr)) & rdy_mask ) != rdy_mask ) {

            static int z=0;

             

             

            if (chip->state != FL_ERASING) {

            /* Someone's suspended the erase. Sleep */

            set_current_state(TASK_UNINTERRUPTIBLE);

            add_wait_queue(&chip->wq, &wait);

             

            cfi_spin_unlock(chip->mutex);

            printk("erase suspended. Sleeping\n");

             

            schedule();

            remove_wait_queue(&chip->wq, &wait);

            #if 0

            if (signal_pending(current))

            return -EINTR;

            #endif

            timeo = jiffies + (HZ*2); /* FIXME */

            cfi_spin_lock(chip->mutex);

            continue;

            }

             

             

            /* OK Still waiting */

            if (time_after(jiffies, timeo)) {

            chip->state = FL_READY;

            cfi_spin_unlock(chip->mutex);

            printk("waiting for erase to complete timed out.");

            DISABLE_VPP(map);

            return -EIO;

            }

             

            /* Latency issues. Drop the lock, wait a while and retry */

            cfi_spin_unlock(chip->mutex);

             

             

            z++;

            if ( 0 && !(z % 100 ))

            printk("chip not ready yet after erase. looping\n");

             

             

            cfi_udelay(1);

             

            cfi_spin_lock(chip->mutex);

            continue;

            }

             

            /* Done and happy. */

            DISABLE_VPP(map);

            chip->state = FL_READY;

            wake_up(&chip->wq);

            cfi_spin_unlock(chip->mutex);

            return 0;

            }

             

             

            static int cfi_amdstd_erase_varsize(struct mtd_info *mtd, struct erase_info *instr)

            {

            struct map_info *map = mtd->priv;

            struct cfi_private *cfi = map->fldrv_priv;

            unsigned long adr, len;

            int chipnum, ret = 0;

            int i, first;

            struct mtd_erase_region_info *regions = mtd->eraseregions;

             

             

            if (instr->addr > mtd->size)

            return -EINVAL;

             

             

            if ((instr->len + instr->addr) > mtd->size)

            return -EINVAL;

             

             

            /* Check that both start and end of the requested erase are

            * aligned with the erasesize at the appropriate addresses.

            */

             

             

            i = 0;

             

             

            /* Skip all erase regions which are ended before the start of

               the requested erase. Actually, to save on the calculations,

               we skip to the first erase region which starts after the

               start of the requested erase, and then go back one.

            */

             

            while (i < mtd->numeraseregions && instr->addr >= regions[i].offset)

                   i++;

            i--;

             

             

            /* OK, now i is pointing at the erase region in which this

               erase request starts. Check the start of the requested

               erase range is aligned with the erase size which is in

               effect here.

            */

             

             

            if (instr->addr & (regions[i].erasesize-1))

            return -EINVAL;

             

             

            /* Remember the erase region we start on */

            first = i;

             

             

            /* Next, check that the end of the requested erase is aligned

            * with the erase region at that address.

            */

             

             

            while (i<mtd->numeraseregions && (instr->addr + instr->len) >= regions[i].offset)

            i++;

             

             

            /* As before, drop back one to point at the region in which

               the address actually falls

            */

            i--;

             

            if ((instr->addr + instr->len) & (regions[i].erasesize-1))

            return -EINVAL;

             

            chipnum = instr->addr >> cfi->chipshift;

            adr = instr->addr - (chipnum << cfi->chipshift);

            len = instr->len;

             

             

            i=first;

             

             

            while(len) {

            ret = do_erase_oneblock(map, &cfi->chips[chipnum], adr);

             

             

            if (ret)

            return ret;

             

             

            adr += regions[i].erasesize;

            len -= regions[i].erasesize;

             

             

            if (adr % (1<< cfi->chipshift) == ((regions[i].offset + (regions[i].erasesize * regions[i].numblocks)) %( 1<< cfi->chipshift)))

            i++;

             

             

            if (adr >> cfi->chipshift) {

            adr = 0;

            chipnum++;

             

            if (chipnum >= cfi->numchips)

            break;

            }

            }

             

             

            instr->state = MTD_ERASE_DONE;

            if (instr->callback)

            instr->callback(instr);

             

            return 0;

            }

             

             

            static int cfi_amdstd_erase_onesize(struct mtd_info *mtd, struct erase_info *instr)

            {

            struct map_info *map = mtd->priv;

            struct cfi_private *cfi = map->fldrv_priv;

            unsigned long adr, len;

            int chipnum, ret = 0;

             

             

            if (instr->addr & (mtd->erasesize - 1))

            return -EINVAL;

             

             

            if (instr->len & (mtd->erasesize -1))

            return -EINVAL;

             

             

            if ((instr->len + instr->addr) > mtd->size)

            return -EINVAL;

             

             

            chipnum = instr->addr >> cfi->chipshift;

            adr = instr->addr - (chipnum << cfi->chipshift);

            len = instr->len;

             

             

            while(len) {

            ret = do_erase_oneblock(map, &cfi->chips[chipnum], adr);

             

             

            if (ret)

            return ret;

             

             

            adr += mtd->erasesize;

            len -= mtd->erasesize;

             

             

            if (adr >> cfi->chipshift) {

            adr = 0;

            chipnum++;

             

            if (chipnum >= cfi->numchips)

            break;

            }

            }

             

            instr->state = MTD_ERASE_DONE;

            if (instr->callback)

            instr->callback(instr);

             

            return 0;

            }

             

             

            static void cfi_amdstd_sync (struct mtd_info *mtd)

            {

            struct map_info *map = mtd->priv;

            struct cfi_private *cfi = map->fldrv_priv;

            int i;

            struct flchip *chip;

            int ret = 0;

            DECLARE_WAITQUEUE(wait, current);

             

             

            for (i=0; !ret && i<cfi->numchips; i++) {

            chip = &cfi->chips[i];

             

             

            retry:

            cfi_spin_lock(chip->mutex);

             

             

            switch(chip->state) {

            case FL_READY:

            case FL_STATUS:

            case FL_CFI_QUERY:

            case FL_JEDEC_QUERY:

            chip->oldstate = chip->state;

            chip->state = FL_SYNCING;

            /* No need to wake_up() on this state change -

            * as the whole point is that nobody can do anything

            * with the chip now anyway.

            */

            case FL_SYNCING:

            cfi_spin_unlock(chip->mutex);

            break;

             

             

            default:

            /* Not an idle state */

            add_wait_queue(&chip->wq, &wait);

             

            cfi_spin_unlock(chip->mutex);

             

             

            schedule();

             

             

                    remove_wait_queue(&chip->wq, &wait);

             

            goto retry;

            }

            }

             

             

            /* Unlock the chips again */

             

             

            for (i--; i >=0; i--) {

            chip = &cfi->chips[i];

             

             

            cfi_spin_lock(chip->mutex);

             

            if (chip->state == FL_SYNCING) {

            chip->state = chip->oldstate;

            wake_up(&chip->wq);

            }

            cfi_spin_unlock(chip->mutex);

            }

            }

             

             

             

             

            static int cfi_amdstd_suspend(struct mtd_info *mtd)

            {

            struct map_info *map = mtd->priv;

            struct cfi_private *cfi = map->fldrv_priv;

            int i;

            struct flchip *chip;

            int ret = 0;

            //printk("suspend\n");

             

             

            for (i=0; !ret && i<cfi->numchips; i++) {

            chip = &cfi->chips[i];

             

             

            cfi_spin_lock(chip->mutex);

             

             

            switch(chip->state) {

            case FL_READY:

            case FL_STATUS:

            case FL_CFI_QUERY:

            case FL_JEDEC_QUERY:

            chip->oldstate = chip->state;

            chip->state = FL_PM_SUSPENDED;

            /* No need to wake_up() on this state change -

            * as the whole point is that nobody can do anything

            * with the chip now anyway.

            */

            case FL_PM_SUSPENDED:

            break;

             

             

            default:

            ret = -EAGAIN;

            break;

            }

            cfi_spin_unlock(chip->mutex);

            }

             

             

            /* Unlock the chips again */

             

             

            if (ret) {

                for (i--; i >=0; i--) {

            chip = &cfi->chips[i];

             

             

            cfi_spin_lock(chip->mutex);

             

            if (chip->state == FL_PM_SUSPENDED) {

            chip->state = chip->oldstate;

            wake_up(&chip->wq);

            }

            cfi_spin_unlock(chip->mutex);

            }

            }

             

            return ret;

            }

             

             

            static void cfi_amdstd_resume(struct mtd_info *mtd)

            {

            struct map_info *map = mtd->priv;

            struct cfi_private *cfi = map->fldrv_priv;

            int i;

            struct flchip *chip;

            //printk("resume\n");

             

             

            for (i=0; i<cfi->numchips; i++) {

             

            chip = &cfi->chips[i];

             

             

            cfi_spin_lock(chip->mutex);

             

            if (chip->state == FL_PM_SUSPENDED) {

            chip->state = FL_READY;

            cfi_write(map, CMD(0xF0), chip->start);

            wake_up(&chip->wq);

            }

            else

            printk("Argh. Chip not in PM_SUSPENDED state upon resume()\n");

             

             

            cfi_spin_unlock(chip->mutex);

            }

            }

             

             

            static void cfi_amdstd_destroy(struct mtd_info *mtd)

            {

            struct map_info *map = mtd->priv;

            struct cfi_private *cfi = map->fldrv_priv;

            kfree(cfi->cmdset_priv);

            kfree(cfi);

            }

             

             

            static char im_name[]="cfi_cmdset_0002";

             

             

            int __init cfi_amdstd_init(void)

            {

            inter_module_register(im_name, THIS_MODULE, &cfi_cmdset_0002);

            return 0;

            }

             

             

            static void __exit cfi_amdstd_exit(void)

            {

            inter_module_unregister(im_name);

            }

             

             

            module_init(cfi_amdstd_init);

            module_exit(cfi_amdstd_exit);

             

             

            MODULE_LICENSE("GPL");

            MODULE_AUTHOR("Crossnet Co. <info@crossnet.co.jp> et al.");

            MODULE_DESCRIPTION("MTD chip driver for AMD/Fujitsu flash chips");

             

            Also Just incase you'd like to know/it helps; even if i echo to /dev/mtd0 it land at same error:

            /dev # echo 1 > /dev/mtd0

             

            Last[0] is ffff

            Last[1] is ffff

            Last[2] is ffff

            Last[2] is ffff, datum is 310a

             

            Thanks For Help !

             

            Vipul Bagga

            • 3. Re: Changed Micron(pc28f256p33bfe i suppose) to Spansion S29GL256S10TF102 failed
              geho

              Hey Vipul,

               

              OK, so somebody has replaced the original 2.4.4 MTD subtree by a slightly newer version and has then edited it.

               

              After looking at your complete sources, I think I know why it is failing. Your code uses unlock bypass mode

              (see cfi_amdstd_write()), a feature that older devices supported, but the GL-S does not support anymore.

              So either you use an older flash device that supports unlock bypass mode or you will have to modify your
              kernel sources to disable it. Newer kernels do not use this feature anymore.

               

              Best regards,
              Gernot

              1 of 1 people found this helpful
              • 4. Re: Changed Micron(pc28f256p33bfe i suppose) to Spansion S29GL256S10TF102 failed
                vipul.bagga_2990166

                Hi,

                Thanks for Inputs, can you give me code snippet/file from where i can get help.

                Please share link of file online (if any) which you feel should work or i can relate to.

                 

                As i'm not kernel developer but i'd like to give hands onto it. So, if you can give provide some links would be great help.

                 

                Thanks ATon

                 

                Vipul Bagga

                • 5. Re: Changed Micron(pc28f256p33bfe i suppose) to Spansion S29GL256S10TF102 failed
                  geho

                  Hi Vipul,

                   

                  I think the easiest would be if you could update the entire Linux kernel to a newer version. If this is not possible you might try to revert to the original 2.4.4 MTD code (kernels are available from www.kernel.org). This version did not use unlock bypass mode yet, and it got removed later in the kernel development. The MTD developers can be reached via Memory Technology Device (MTD) Subsystem for Linux. (there is a mailing list).

                   

                  Best regards,
                  Gernot

                  1 of 1 people found this helpful
                  • 6. Re: Changed Micron(pc28f256p33bfe i suppose) to Spansion S29GL256S10TF102 failed
                    vipul.bagga_2990166

                    Hi,

                     

                    Thank you for your tremendous help ; will try all your inputs and let see how it goes.

                     

                    Br.

                    Vipul Bagga

                    • 7. Re: Changed Micron(pc28f256p33bfe i suppose) to Spansion S29GL256S10TF102 failed
                      vipul.bagga_2990166

                      Hi Again,

                       

                      Sorry to bother you again.

                       

                      what I noticed while trying your suggestion is that file(cfi_cmdset_0002.c) is from kernel version linux-2.4.33.1(but board shows 2.4.4 probably someone must have updated this driver).

                       

                      And apart from this I tried replacing it with 2.4.4 but it didn't worked.

                      Also I think this flash support unlock bypass mode; some details from Datasheet below:

                       

                      (SA) + 0050h 0001h

                      Program Suspend

                      00 = Not Supported

                      01 = Supported

                      (SA) +0051h 0000h

                      Unlock Bypass

                      00 = Not Supported

                      01 = Supported

                      (SA) + 0052h 0009h Secured Silicon Sector (Customer OTP Area) Size 2N (bytes)

                       

                      Can you think of anything that I can try now.

                       

                      Br.

                      Vipul

                      • 8. Re: Changed Micron(pc28f256p33bfe i suppose) to Spansion S29GL256S10TF102 failed
                        geho

                        Hi Vipul,

                         

                        the CFI table that you refer to is a general table showing what features the device supports and what not.

                        (SA) +0051h    0000h    Unlock Bypass    (00 = Not Supported, 01 = Supported)

                        means that the value is 00 indicating that Unlock Bypass is not supported by the device.

                         

                        When you say the original 2.4 code did not work, what did not work? Did you get compile errors?

                        Or runtime errors? You probably would have to roll-back the entire MTD package to keep things

                        homogeneous. Or roll forward to a newer kernel. Both approaches are not easy, I agree.

                         

                        I might be easier to try a GL256N instead of a GL256S, but I am not sure if you can still get those.

                        How many devices are affected by this? Is this a larger production?

                         

                        Best regards,

                        Gernot

                        • 9. Re: Changed Micron(pc28f256p33bfe i suppose) to Spansion S29GL256S10TF102 failed
                          vipul.bagga_2990166

                          Hi Gernot,

                           

                          Yes initially when i run it just by just replacing file; it gave alot of error.

                          Then I modified code in cfi_amdext_write() to match the cfi_amdext_write_2_by_16() function in 2.4.4.,

                           

                          And even i didn't understood the changes in bold. It just comes here and stops(I mean no logs after that on screen).

                           

                          Code:

                          if (len) {

                          unsigned int tmp;

                           

                          /* Final byte to write */

                          #if defined(__LITTLE_ENDIAN)

                          tmp = map->read32(map, ofs);

                           

                          tmp = 0xffffffff >> (len*8);

                          tmp = tmp << (len*8);

                          tmp |= *(__u32 *)(buf);

                          ret = do_write_2_by_16_oneword(map, &cfi->chips[chipnum],

                                 ofs, tmp);

                          #elif defined(__BIG_ENDIAN)

                          #error not support big endian yet

                          #else

                          #error define a sensible endianness

                          #endif

                           

                          if (ret)

                          return ret;

                          ! !

                          (*retlen)+=len;

                          }

                           

                          And yes its big production;we're planning to change flash in next generation device . But person who was doing it left few weeks ago.

                          So, i'm trying to get this thing done.

                          And link to datasheet i'm following is : http://www.cypress.com/file/177976/download

                           

                           

                          Br.

                          Vipul Bagga

                          • 10. Re: Changed Micron(pc28f256p33bfe i suppose) to Spansion S29GL256S10TF102 failed
                            geho

                            Hi Vipul,

                             

                            > And yes its big production

                             

                            how big is the volume, i.e. how many flash devices do you need per year?

                            And do you already have a sales person as contact? Finally, where are you based?

                             

                            We might get you local support.

                             

                            Thanks,

                            Gernot

                            • 11. Re: Changed Micron(pc28f256p33bfe i suppose) to Spansion S29GL256S10TF102 failed
                              vipul.bagga_2990166

                              Hi,

                               

                              I had word with my Boss; He said that currently we're working on just development of next gen product. So, it'll take a lot of time to be honest; and it to early to commit to be honest .

                               

                               

                              So, finally I've to do it somehow. And Thanks for your HELP.

                               

                              I proposed them to change Part, so can you please suggest any similar part that support "Unlock ByPass" mode.

                              [Last time you suggested GL256N; but you were not sure about availability i suppose ]

                               

                              Br.

                              Vipul

                              • 12. Re: Changed Micron(pc28f256p33bfe i suppose) to Spansion S29GL256S10TF102 failed
                                vipul.bagga_2990166

                                Hi Gernot,

                                I'm back again to bother you .

                                 

                                Recently our hardware team had word with cypress and they suggested one chip. But, meanwhile in spare time, i'm still trying to get things working on the same chip.

                                So, what I did was; turned down all the bits related to Unlock bypass mode (As you suggested)and then that Datum errors were not coming.

                                But, instead now i'm stuck in while loop in function "cfi_amdstd_write" due to 'len ' parameter passed to it.

                                 

                                Issue is:

                                 

                                 

                                 

                                 

                                And do you think its progressing ?

                                Function:

                                static int cfi_amdstd_write (struct mtd_info *mtd, loff_t to , size_t len, size_t *retlen, const u_char *buf)

                                 

                                Code Snippet from function:

                                 

                                   while(len >= CFIDEV_BUSWIDTH) {

                                        __u32 datum;

                                 

                                        if (cfi_buswidth_is_1()) {

                                            datum = *(__u8*)buf;

                                        } else if (cfi_buswidth_is_2()) {

                                            datum = *(__u16*)buf;

                                        } else if (cfi_buswidth_is_4()) {

                                            datum = *(__u32*)buf;

                                        } else {

                                            return -EINVAL;

                                        }

                                       ret = do_write_oneword(map, &cfi->chips[chipnum],

                                                       ofs, datum, cfi->fast_prog);

                                 

                                        if (ret) {

                                            if (cfi->fast_prog){

                                                /* Get out of unlock bypass mode */

                                                cfi_send_gen_cmd(0x90, 0, chipstart, map, cfi, cfi->device_type, NULL);

                                                cfi_send_gen_cmd(0x00, 0, chipstart, map, cfi, cfi->device_type, NULL);

                                            }

                                            return ret;

                                        }

                                 

                                        ofs += CFIDEV_BUSWIDTH;

                                        buf += CFIDEV_BUSWIDTH;

                                        (*retlen) += CFIDEV_BUSWIDTH;

                                        len -= CFIDEV_BUSWIDTH;

                                 

                                        if (ofs >> cfi->chipshift) {

                                            if (cfi->fast_prog){

                                                /* Get out of unlock bypass mode */

                                                cfi_send_gen_cmd(0x90, 0, chipstart, map, cfi, cfi->device_type, NULL);

                                                cfi_send_gen_cmd(0x00, 0, chipstart, map, cfi, cfi->device_type, NULL);

                                            }

                                 

                                            chipnum ++;

                                            ofs = 0;

                                            if (chipnum == cfi->numchips)

                                                return 0;

                                            chipstart = cfi->chips[chipnum].start;

                                 

                                            if (cfi->fast_prog){

                                                /* Go into unlock bypass mode for next set of chips */

                                                cfi_send_gen_cmd(0xAA, cfi->addr_unlock1, chipstart, map, cfi, CFI_DEVICETYPE_X8, NULL);

                                                cfi_send_gen_cmd(0x55, cfi->addr_unlock2, chipstart, map, cfi, CFI_DEVICETYPE_X8, NULL);

                                                cfi_send_gen_cmd(0x20, cfi->addr_unlock1, chipstart, map, cfi, CFI_DEVICETYPE_X8, NULL);

                                            }

                                        }

                                    }

                                 

                                Thanks in Advance & Happy New Year

                                 

                                 

                                 

                                • 13. Re: Changed Micron(pc28f256p33bfe i suppose) to Spansion S29GL256S10TF102 failed
                                  geho

                                  Hi Vipul,

                                   

                                  how did you deactivate the unlock bypass mode? Did you remove all cfi_send_gen_cmd() calls to enter/exit unlock bypass mode (I still see them in above code)? Also please note that you will have to add unlock cycles before all program command sequences, in this case (take a look at the data sheet, command table).

                                   

                                  And how did it fail? Was it just hanging? That might happen if you did not add the 2 unlock cycles to the program operations. Then the device would not start programming and the driver might just hang or wait a long time until it finally times out.

                                   

                                  Best regards,

                                  Gernot

                                  • 14. Re: Changed Micron(pc28f256p33bfe i suppose) to Spansion S29GL256S10TF102 failed
                                    vipul.bagga_2990166

                                    Hi,

                                     

                                    1. Yes I disabled all call to unlock bypass mode  ->  After going through the code I noticed the variable "cfi->fast_prog" in cfi_probe.c is controlling all 'if condtiions' so i disable this flag to  "cfi->fast_prog=0" so that it doesn't go into this mode.

                                     

                                    2. "Also please note that you will have to add unlock cycles before all program command sequences, in this case (take a look at the data sheet, command table)."  ->

                                                   a. Do you mean i need to add unlock cycles; inspite of fact that device don't "support Unlock bypass"

                                                   b. Can you please share some file for REF. or snippet; which can help.

                                    3. It doesn't hang at particular command, but "cfi_amdstd_write" function is called again and again with len =1500 and len=8192 was continuously going through while loop  ->"while(len >= CFIDEV_BUSWIDTH) ". [Code is in previous reply]

                                     

                                    4. And In logs i observed code is taking this device as 16bit, is it right. or should i check hardware pin/bus connection for this.

                                    Logs:

                                    Primary Vendor Command Set: 0002 (AMD/Fujitsu Standard)

                                    Primary Algorithm Table at 0040

                                    Alternative Vendor Command Set: 0000 (None)

                                    lash Device Interface description: 0x0001

                                      - x16-only asynchronous interface

                                    Max. bytes in buffer write: 0x200

                                    Number of Erase Block Regions: 1

                                    Erase Region #0: BlockSize 0x20000 bytes, 256 blocks

                                    Erase Region #0: BlockSize 0x20000 bytes, 256 blocks

                                    Wake up to 16write:

                                     

                                    Meanwhile i'll go through the datasheet, and try to understant what you mean.

                                     

                                    Br.

                                    Vipul

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