3 Replies Latest reply on Dec 12, 2017 5:25 AM by msur

    The number of interrupt for M0+

    user_474444345

      Hello,

       

      I think that NVIC of M0+ can select 32 interrupts from 147 as for block diagram of TRM.

      But we cannot set interrupt number of except of 3 to 29.

       

      Why cannot we chose the number such as 1, 2, 30 or 31?

       

      Best regards,

        • 1. Re: The number of interrupt for M0+
          msur

          Hello,

           

          Yes M0+ allows 32 interrupts as captured in TRM. However, CM0+ interrupt channels 0-2 and 30-31 are reserved for system use, inter-processor communication, and the crypto driver. Other IRQn channels (3-29) are available to the user application.

           

          This is captured in the System Interrupt PDL documentation. TRM captures the device capabilities and since these usage is a software/firmware wrapper to implement certain system level functions, these details are not captured in TRM.

           

          Let me know if this helps.

           

          Regards,

          Meenakshi Sundaram R

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          • 2. Re: The number of interrupt for M0+
            user_474444345

            Hello,

             

            Thanks.

            I find the sentence in Cypress Peripheral Driver Library 3.0.1 (build 716). TRM you said is for PDL?

            If yes, I can not find the TRM.

             

            Is that TRM opend?

             

            Best regards,

            • 3. Re: The number of interrupt for M0+
              msur

              TRM does not include the information because TRM only captures device capabilities in hardware. The implementation is a software wrapper and hence captured only in PDL documentation.

               

              Regards,

              Meenakshi Sundaram R