Hello Nam Son Tran,
Q) Is there any trouble to all the target devices below? Or this instruction will be ignored?
A) No there is no problem.
Q) I understand that there should be no issue if we execute FFh after POR, is it correct?
A) Yes you are correct.there shouldbe no issue.
Thanks for your answer, I have has another question regarding the target device below.
Note: DDR is not used, only Standard SPI / Quad SPI is used.
■Question: Which Psck is being used when calculating the minimum value of tWH(tCH) or tWL(tCL) ?
1) Frequency that device is using?
2) Fsck,c (max) 133MHz ?
3) The highest frequency after setting the dummy clock with LC bit?
Eg. In SDR High Performance mode, LC = 00 (EBh/ECh Mode=2, dummy = 4). Psck max = 80MHz
Hello Nam son tran,
Q) Which Psck is being used when calculating the minimum value of tWH(tCH) or tWL(tCL) ?
A) The minimum value is 45% of Psck. So the value depends on the frequency you are operating.
Q) The highest frequency after setting the dummy clock with LC bit?
A) In SDR high performance mode it is 133MHz, LC = 00 and Dummy cycles = 8
I know the minimum value is 45% of Psck. What I'm asking is : which Psck is used to calculated?
1) 2) 3) or 4)?
Notice that DDR is not used, only Standard SPI / Quad SPI is used.
Could you update your response on my latest question??
Hi Nam son Tran,
The frequency that is used for calculating Psck is the one which the device is operating at that point. i.e option No 1).