ADC_SAR_Seq measurement on 9 pins

Can it be that you leave the pins floating? There is no expected value in this case.

Bob

Bob and Therese,

I am basically getting the same effect.  I am using a PSoC 5LP and an ADC_SAR_SEQ with 4 GPIO inputs configured as High-impedance Analog.

When I place only one voltage (~3V) on any pin of the 4 inputs, I see this voltage (from 2V to 3V) appear on ALL ADC results AND all the non-voltage driven inputs.

It would appear there is Hardware mux leakage since I can see these values in the ADC results as well as the inputs themselves.

Is there a way to get true HW isolation between the muxed inputs?  This is very important to the application I am running.

Len

Can you please post your complete project (or a shortened version that shows the error) so that we all can have a look at all of your settings. To do so, use

Creator->File->Create Workspace Bundle (minimal)

and attach the resulting file.

Bob

Bob,

I've got the compressed bundle you wanted.

If I can venture a guess ... I think the underlying amux used in ADC_SAR_SEQ is not set to "Maximum" isolation and the AtMostOneActive is not set.

Len

Len,

There is a cap array at the input which forms the sampling and DAC network. The cap array is not discharged when the channel is switched. I am still confirming with the design team. 

From the usage point of view, it is not a good idea to leave the ADC input floating. You can add a pull down resistor if there is such a case in your application. Make sure the output impedance of the input signal source doesn't cause much error while adding a pull down resistor or add a calibration mechanism to nullify the error.

-Rajiv

For interleaved ADC inputs, it is normal to observe a cross-talk between sampled channels. It comes from sampling capacitor and input resistance, and gets worse with increasing frequency of channel switching. Typical solutions

(1). add terminating resistor to the GND on each input pin (100 - 1000 oHm). The drawback is that input impedance becomes low, and some crosstalk will remain anyway. It is typically assumed that ADC inputs are connected to multiple sensors with buffered outputs, or a battery source with low impedance (<1k). Then this impedance serves as input terminating resistor.

(2). Double number of inputs, and ground each second one. This way each second ADC sample is wasted, but sampling capacitor is always discharged to zero before sampling real data from unterminated pins. Now input impedance is high (~20k), but sampling rate is twice lower.

/odissey1

Ok. Got a confirmation that the sampled voltage is retained as the channel is switched. This helps to lower the current intake from the source, if there was only one channel being read continuously; thereby improving input impedance.

/odissey1,

Thanks.  You're probably right.  (1) is not workable for me since the input I need to measure I also need to measure the current load.  Therefore a parallel input resistor will load the input (which has internal source resistance) and give a wanky current readings as well.

I may implement your (2) suggestion.  Sadly, the ADC_SAR_Seq device assumes a front-end mux.  You'd think they would incorporate your (2) idea in the object behind the scenes.

Len

Rajiv,

Thanks for your research in this issue.  Suggeston:  Look into /odissey1's (2) idea. 

Len