We have just switched to S29GL01 flash chips; any sample access code available?

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Anonymous
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We were previously using Micron flash chips, but have switched to S29GL01; we have a 32-bit interface, two 16-bit chips in parallel.

We can read the CFI data from the chips successfully, using the Altera BSP interface, but write operations are failing.

Is it possible to obtain sample code for this device, that will work in this configuration with your chips?

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8 Replies
Anonymous
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Hello Daniel,

We do not ave any sample codes with S29GL01 using Altera BSP interface. Please let us know what is data you are observing when you read back after the write operation. I mean What is the expected data and what is it you are reading/observing.

Thanks,

Krishna.

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Anonymous
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Hi Krisha;

Thanks for your response;

First, I found that the Altera BSP is irrelevant to this issue; I am directly accessing the Flash chip; that makes things easier!!

I found the Spansion LowLevelDriver_v15.3.1 package, which has source code for several chips, as well as the user guide called Cypress_pNOR LLD User Guide_revE.pdf, which I have been referring to. I’ve also been studying the data sheet S29GL01GS from Cypress, Revised September 21, 2017.

So I am trying to write basic code to access the chip; to start with, I’m just trying to read the CFI data;

Note that our flash chips are in 32-bit interlaced mode, what your lld refers to as LLD_CONFIGURATION_X16_AS_X32

I know that the CFI data is readable (somehow), because the Altera Flash Programmer was able to read it, though it was not able to write to the Flash successfully. So the CFI data is:

Found CFI table in 32 bit x16||x16 mode

Raw CFI query table read from device:

0: 01 00 01 00 7E 22 7E 22 00 00 00 00 BF FF BF FF ....~"~"........

10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

30: 03 00 03 00 00 00 00 00 28 22 28 22 01 22 01 22 ........("("."."

40: 51 00 51 00 52 00 52 00 59 00 59 00 02 00 02 00 Q.Q.R.R.Y.Y.....

So I tried using the CFI enable commands in the data sheet:

quote:

The following is a C source code example of using the CFI Entry and Exit functions. Refer to the Cypress Low Level Driver User's

Guide (available on www.cypress.com) for general information on Cypress flash memory software development guidelines.

/* Example: CFI Entry command */

*( (UINT16 )base_addr + 0x55 ) = 0x0098; / write CFI entry command */

/* Example: CFI Exit command */

*( (UINT16 )base_addr + 0x000 ) = 0x00F0; / write cfi exit command */

I’m using base_addr = 0 (our flash device begins at address 0x00000000 in our memory map).

The code I used is:

/* Example: CFI Entry command */

(base_addr + 0x55 ) = 0x00980098; / write CFI entry command */

memcpy((uint8)DevIDandCFIdata, (uint8)base_addr, DEVICE_DATA_SIZE);

/* Example: CFI Exit command */

*( (uint32 )base_addr + 0x000 ) = 0x00F000F0; / write cfi exit command */

However, the data that I read is completely invalid:

00000: F0 00 F0 00 00 00 64 64 00 00 00 64 00 00 64 64 | ?.?...dd...d..dd |

00010: 00 00 00 64 00 00 64 64 00 00 00 64 00 00 64 64 | ...d..dd...d..dd |

00020: 00 00 00 64 00 00 64 64 00 00 00 64 00 00 64 64 | ...d..dd...d..dd |

00030: 00 00 00 64 00 00 64 64 00 00 00 64 00 00 64 64 | ...d..dd...d..dd |

00040: 00 00 00 64 00 00 64 64 00 00 00 64 00 00 64 64 | ...d..dd...d..dd |

So what am I missing here?? What else do I have to do, to read the CFI data?

BTW, I tried using the commands from your LLD, but it gave exactly the same, invalid, results…

Dan Miller

Stryker Endoscopy

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Anonymous
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Hello Daniel,

instead of hard coding the commands and unlock cycles yourself You can use our APIs provided in the lld_S29GlxxxS file which is resent in "S29GlxxS" under  "device_specific"  folder.

for CFI entry you can use "lld_CfiEntryCmd"  and " lld_CfiExitCmd" for exit.

Please try using th above APIsand let us know if you are observing the same issue.

Thanks,

Krishna.

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Anonymous
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Actually, I have tried those, and they don’t work either… in fact, they fail exactly the same way.

The code that I used is:

#define FLASH_DEVICE_BASE_ADDR 0X00000000U

FLASHDATA* base_addr = (FLASHDATA*) FLASH_DEVICE_BASE_ADDR; uint32 offset = 0 ;

lld_ResetCmd(base_addr);

lld_CfiEntryCmd(base_addr, offset);

reportStringf("\r\n");

CommonFuncs_hexDump((uint8*) &base_addr, 32, true);

reportStringf("\r\n");

lld_CfiExitCmd(base_addr);

// output of the dump:

00000: 00 00 00 00 00 00 00 00 FC 21 04 80 61 00 00 00 | ........?!.?a... |

00010: FC 21 04 80 F7 0F 00 00 BB 27 00 00 00 00 00 00 | ?!.??...?'...... |

However, that data is not valid for CFI; our CFI data looks like:

Raw CFI query table read from device:

0: 01 00 01 00 7E 22 7E 22 00 00 00 00 BF FF BF FF ....""........

10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................

30: 03 00 03 00 00 00 00 00 28 22 28 22 01 22 01 22 ........("("."."

40: 51 00 51 00 52 00 52 00 59 00 59 00 02 00 02 00 Q.Q.R.R.Y.Y.....

This is why I’ve tried switching back to hand-coding the commands, based on info from the data sheet; however, that does not work either!!

Dan

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Anonymous
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Just to clarify things, here is the code that I am currently executing, followed by the resulting output…

Note, in particular, that the output after lld_CfiEntryCmd() is exactly the same as what I read before the command;

In other words, lld_CfiEntryCmd() did not put the chip(s) in CFI ASO mode…

Dan Miller

static void run_flash_test_function(void)

{

char wrbuf[TEST_WRITE_SIZE+1] ;

FLASHDATA baseAddr = (FLASHDATA) FLASH_DEVICE_BASE_ADDR;

FLASHDATA* base_addr = &baseAddr;

uint32 offset = 0 ;

reportStringf("Pre-read beginning of flash\r\n");

lld_ResetCmd(base_addr);

CommonFuncs_hexDump((uint8*)&base_addr, 64, true);

reportStringf("Try doing it Cypress' way...\r\n");

lld_CfiEntryCmd(base_addr, offset);

// FLASH_WR(base_addr, ((offset & SA_OFFSET_MASK) + LLD_CFI_UNLOCK_ADDR1)<<2, NOR_CFI_QUERY_CMD);

reportStringf("\r\n");

CommonFuncs_hexDump((uint8*) &base_addr, 160, true);

reportStringf("\r\n");

lld_CfiExitCmd(base_addr);

FLASHDATA fstatus = lld_StatusGetReg(base_addr, offset);

reportStringf("flash status register A: 0x%08lX\r\n", fstatus);

FLASHDATA fdata4 = lld_ReadCfiWord(base_addr, 4);

FLASHDATA fdata8 = lld_ReadCfiWord(base_addr, 8);

FLASHDATA fdatac = lld_ReadCfiWord(base_addr, 0xC);

reportStringf("flash CFI word reads A: 4:0x%08X 8:0x%08X c:0x%08X\r\n", fdata4, fdata8, fdatac);

return ;

}

Pre-read beginning of flash

00000: D0 FF FF 81 90 1F 00 80 00 00 00 00 F0 00 F0 00 | ?????..?....?.?. |

00010: 61 00 00 00 C0 23 04 80 2F 0F 00 00 19 3A 00 00 | a...?#.?/....:.. |

00020: 00 00 00 00 E8 B7 01 80 01 00 00 00 A0 86 01 00 | ....??.?....??.. |

00030: 38 39 00 80 00 00 00 00 EF BE AD DE EF BE AD DE | 89.?....???????? |

Try doing it Cypress' way...

00000: D0 FF FF 81 90 1F 00 80 00 00 00 00 F0 00 F0 00 | ?????..?....?.?. |

00010: 61 00 00 00 C0 23 04 80 2F 0F 00 00 19 3A 00 00 | a...?#.?/....:.. |

00020: 00 00 00 00 E8 B7 01 80 01 00 00 00 A0 86 01 00 | ....??.?....??.. |

00030: 38 39 00 80 00 00 00 00 EF BE AD DE EF BE AD DE | 89.?....???????? |

00040: EF BE AD DE EF BE AD DE EF BE AD DE 84 77 03 80 | ?????????????w.? |

00050: FB 6D 57 FB EF BE AD DE 88 02 00 80 D7 77 70 6D | ?mW??????..??wpm |

00060: E5 10 BD F6 E4 DB DF 77 BF C7 3F D5 9F 6F B3 CB | ?.?????w?????o?? |

00070: 7E 3D 63 9F BB E9 E3 BF FD C7 E9 CD 5E 6D F7 8F | ~=c?????????^m?? |

00080: ED CF D2 37 F7 EB D7 FF A4 5F 5C D9 B9 EA AE E3 | ???7?????_\????? |

00090: E7 BB B7 E2 CF 9E FA FF FE 67 7F 5F F5 57 DC EF | ?????????g?_?W?? |

flash status register A: 0x00F000F0

flash CFI word reads A: 4:0x00003A19 8:0x000186A0 c:0xDEADBEEF

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Anonymous
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Hello Daniel,

Looks like  there is a device_multiplier which is missing as you are using an interleaving configuration.  To enter CFI mode, you should send 0x00980098 to address 0xAA (which is 0x55 x 2) all the addresses are multiplied by 2.

for the CFI command:

Write 0x00980098 to byte address 0x154

Thanks,

Krishna.

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Anonymous
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Hi Krishna;

Okay, I tried both of the addresses that you suggested, and results are exactly the same in all cases!!

Commands and outputs are shown below.

BTW, do you see the F0 00 F0 00 at beginning of the block in each case?

That is the lld_ResetCmd() command which I sent just before the initial read; Reset Command is 0x00F000F0 !!

So why am I reading that back???

Dan

Write command:

((uint32) 0xAA) = NOR_CFI_QUERY_CMD; /* write CFI entry command */

Pre-read beginning of flash

00000: F0 00 F0 00 00 00 00 00 08 27 04 80 61 00 00 00 | ?.?......'.?a... |

00010: 08 27 04 80 AC 78 00 00 50 8D 00 00 00 00 00 00 | .'.??x..P?...... |

00020: C4 BA 01 80 01 00 00 00 A0 86 01 00 34 39 00 80 | ??.?....??..49.? |

00030: 00 00 00 00 EF BE AD DE EF BE AD DE EF BE AD DE | ....???????????? |

Try doing it Cypress' way... CFI_QUERY=0x00980098, dest=0xAA

00000: F0 00 F0 00 00 00 00 00 08 27 04 80 61 00 00 00 | ?.?......'.?a... |

00010: 08 27 04 80 AC 78 00 00 50 8D 00 00 00 00 00 00 | .'.??x..P?...... |

00020: C4 BA 01 80 01 00 00 00 A0 86 01 00 34 39 00 80 | ??.?....??..49.? |

00030: 00 00 00 00 EF BE AD DE EF BE AD DE EF BE AD DE | ....???????????? |

*********************************************************************

Write command:

((uint32) 0x154) = NOR_CFI_QUERY_CMD; /* write CFI entry command */

Pre-read beginning of flash

00000: F0 00 F0 00 00 00 00 00 08 27 04 80 61 00 00 00 | ?.?......'.?a... |

00010: 08 27 04 80 AB 78 00 00 30 A9 00 00 00 00 00 00 | .'.??x..0?...... |

00020: C0 BA 01 80 01 00 00 00 A0 86 01 00 34 39 00 80 | ??.?....??..49.? |

00030: 00 00 00 00 EF BE AD DE EF BE AD DE EF BE AD DE | ....???????????? |

Try doing it Cypress' way... CFI_QUERY=0x00980098, dest=0x0154

00000: F0 00 F0 00 00 00 00 00 08 27 04 80 61 00 00 00 | ?.?......'.?a... |

00010: 08 27 04 80 AB 78 00 00 30 A9 00 00 00 00 00 00 | .'.??x..0?...... |

00020: C0 BA 01 80 01 00 00 00 A0 86 01 00 34 39 00 80 | ??.?....??..49.? |

00030: 00 00 00 00 EF BE AD DE EF BE AD DE EF BE AD DE | ....???????????? |

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Anonymous
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To summarize this discussion, and close this topic out:
I believe I've clearly shown that the interface to these chips is not working on our board.  I have passed the issue back to the hardware engineers, who are pursuing it at this time.

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