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For CY7C1470B of pipelined SRAM, DQs pins are not defined to connect pin#.
Can DQs pins connect to any DQn pins of controler side? or
Should the pins connect to each 8bit such as below?
DQa : DQ0 to DQ7
DQb: DQ8 to DQ15
DQc: DQ16 to DQ24
DQd: DQ25 to DQ32
Best Regards,
Masaya
Solved! Go to Solution.
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Hi Masaya,
We have a Knowledge base article on this topic. Please go through it once and let us know if it answers your query.
Constraints and Interchangeability of Data and Address pins in Sync SRAMs
Thanks and Regards,
Pradipta.
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Hi Masaya,
We have a Knowledge base article on this topic. Please go through it once and let us know if it answers your query.
Constraints and Interchangeability of Data and Address pins in Sync SRAMs
Thanks and Regards,
Pradipta.