I have met a problem for read continuously for the SRAM. The DSP can read and write correctly when I treat the data as 16bit, e.g., short. But the high 16 bit does not work when the DSP read and write 32bit data, e.g., long.
I’m using the TMS320F28377S processor from TI, and the SRAM CY7C1051DV33.
The DSP said no delay when a read followed by a read or write followed by a write between cycles. I’m wondering if the SRAM work if the CE pin is low continuously and read 2 16bit together.
Thanks a lot.
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