Hi there, i am working though the design example AN70938 for the bulk loop transfer. I have hooked up my FPGA board to the FX3 ez-usb3 device. I am ready to go, however i would like to be able to view the state machine of the GPIF2 for bulk loop transfers. The source file does not appear in AN70938 for the state machine. They should have the extension of cyfx. Does any one know what these have been left out of the examples and where they can be found?
I think there is a mistake in the App Note number you mentioned. Can you please check.