It depends on the VIOH (min) value of RESET pin @ 3.3V (I believe your CVDDQ is at 3.3V). Unfortunately this information is not available in the FX3 datasheet.
Cy tech support, please help.
Please refer to Table 8 (DC Specifications) in FX3 Datasheet. If your VIO1 is 3.3V, then Vioh ranges fromm 0.625 * VIO1 to VIO1 + 0.3, that is 2V to 3.6V
So the fluctuations in your board might cause problem. We recommend you to rework your board and provide required isolation.
- Madhu Sudhan
CVDDQ is powering RESET IO, not VIO1. The IO levels for RESET pin may be different from GPIOs. Please clarify.