1 Reply Latest reply on Oct 17, 2017 1:49 PM by msur

    Using a DMA to create histogram

    user_472517788

      Is possible to do this line of code using just a DMA.

      aBuffer[ADC_SAR_1_GetResult16()]++;

      Basically want to take the value returned from the ADC and use it as a destination index and then increment a word in an array to create a histogram in the that array. 

      Very new to the psoc but thought maybe with all the extra built in hardware logic something like this could be done.

      Thanks

      David

        • 1. Re: Using a DMA to create histogram
          msur

          Hello David,

           

          It is not possible to implement the statement entirely using DMA. As you definitely cannot do a '++' to a memory location using DMA (it only transfers data).

           

          Now you do not need CPU for this operation too. You can use UDBs to implement a simple logic for the '++'. May be something like below:

          1. Since DMA descriptors are in memory, you can actually update the source address of one descriptor (which is in RAM) through another descriptor. i.e. using one descriptor do a 16-bit (half-word) transfer of the SAR result to the LSb 16-bits of the source address of the second descriptor. This descriptor by default shall point to aBuffer[0] and with updated LSb 16-bits this will fetch the variable address you want to increment (aBuffer[SAR_RESULT]).

          2. Once that transfer is complete, you can initiate a transfer using the 2nd (updated) descriptor. This transfer will move 1/2/4 bytes of histogram data from aBuffer[SAR_RESULT] to a UDB FIFO register (1/2/4 byte wide).

          3. Perform an increment operation in the UDB by taking data from FIFO.

          4. Use a third DMA descriptor to transfer the UDB 8/16/32-bit working register output to aBuffer[SAR_RESULT] address (you can transfer the source address 16-bits generated in step 1 to the destination address LSb 16-bits of the 3rd descriptor, while you are performing the transfer/increment in step 2/3).

           

          This will require some decent UDB/verilog coding skills. But is definitely possible and all the above should take around 4-5 cycles. Instead of descriptors, if you pick independent channels with a descriptor each, the routing complexity in TopDesign might come down

           

          Regards,

          Meenakshi Sundaram R