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If you want the UDB UART to be active and still want to use Low Power modes, then you need to make use of Alternate Active Mode only.
Going further, I checked the documentation for PSoC 4 and PSoC 6 and discovered that the dedicated Serial Communication Blocks on those chips can operate in deep sleep, but only in SPI and I2C slave mode. Is that correct?
By operational - it means they can be used as Wake-Up sources. For e.g., In case of I2C Slave, PSoC can be woken up by an external I2C Master on Slave address match. The data following the Slave address in the Wake-Up packet can also be received by the slave.