0 Replies Latest reply on Oct 8, 2017 2:35 PM by gfoersler_2625781

    Utilization of the Unused GPIF Control Lines in Port Mode

    gfoersler_2625781

      Hi,

       

      Here and here and here and here and here , information can be found on the Utilization of the Unused GPIF Control Lines in Port Mode.

       

      The first one is the most informative, the last one might benefit from an update (it says that it would be better to use other GPIOS, but the question was rather if it can be done, not if there were more practical ways).

       

      What I get from those articles ist, that it is indeed possible to utilize unused GPIF Control Lines as GPIO lines in GPIF Mode, but that one has to  care that these lines will not be utilized by the GPIF engine or otherwise data corruption can occur.

       

      The information that I am missing, is if these control lines can be utilized also in the port mode. Is their state in port mode the same as in GPIF mode in the Idle state? Or are they in some other state like high impedance, and are only active if GPIF mode is active?

       

      Added by edit:

       

      If I change the according GPIFIDLECTL register values in order to change the control signals (from low to high or vice versa), I assume these changes have direct effect on the pins if GPIF mode is active and the state machine is in the Idle state.

       

      What if I update these register values when the GPIF is in any other state? Does my update have a direct effect or does the register update only take effect once the state machine arrives at the Idle state again?

       

      Assuming that the control lines are also active in Port mode: What if the Port mode is active and I update the GPIFIDLECTL register? Does my update have a direct effect or does the register update only take effect once I switch to GPIF mode(at least temporarily)?

       

       

      Also regarding any output: I assume in suspend or idle mode (power management) all the active outputs stay active and keep their actual logic output state, right? And any current that is drawn out of a high output has to be added to the suspend current?

       

      Thanks in advance.